component
SN74HC251PW
Public Made by Adomby adom
Texas Instruments Signal Switches, Multiplexers, Decoders, TSSOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+9−6@@ -32,7 +32,7 @@ "number": "1", "name": "D3", "type": "input",- "description": "Data input D3. Routed to the Y/W outputs when the select code (C,B,A) = (0,1,1) and /OE is low. CMOS logic input, VIH/VIL per VCC (e.g. 3.15 V/1.35 V at VCC = 4.5 V), input current \u00b11 \u03bcA max."+ "description": "Data input D3. Routed to the Y/W outputs when the select code (C,B,A) = (0,1,1) and /OE is low. CMOS logic input, VIH/VIL per VCC (e.g. 3.15 V/1.35 V at VCC = 4.5 V), input current ±1 μA max." }, { "number": "2",@@ -56,19 +56,19 @@ "number": "5", "name": "Y", "type": "tri_state",- "description": "True (non-inverted) 3-state data output. Drives the selected Dn value; goes to high-impedance (Z) when /OE is high. \u00b16 mA drive at VCC = 5 V; interfaces directly with system bus or drives up to 15 LSTTL loads."+ "description": "True (non-inverted) 3-state data output. Drives the selected Dn value; goes to high-impedance (Z) when /OE is high. ±6 mA drive at VCC = 5 V; interfaces directly with system bus or drives up to 15 LSTTL loads." }, { "number": "6", "name": "W", "type": "tri_state",- "description": "Complementary (inverted) 3-state data output. Drives the logical inverse of the selected Dn; goes to high-impedance (Z) when /OE is high. \u00b16 mA drive at VCC = 5 V."+ "description": "Complementary (inverted) 3-state data output. Drives the logical inverse of the selected Dn; goes to high-impedance (Z) when /OE is high. ±6 mA drive at VCC = 5 V." }, { "number": "7", "name": "/OE", "type": "input",- "description": "Active-low output enable (strobe). When high, both Y and W outputs are placed in the high-impedance (3-state) state regardless of select or data inputs; when low, the selected Dn drives Y (true) and W (inverted). Standard CMOS input, \u00b11 \u03bcA max input current."+ "description": "Active-low output enable (strobe). When high, both Y and W outputs are placed in the high-impedance (3-state) state regardless of select or data inputs; when low, the selected Dn drives Y (true) and W (inverted). Standard CMOS input, ±1 μA max input current." }, { "number": "8",@@ -122,7 +122,7 @@ "number": "16", "name": "VCC", "type": "power_in",- "description": "Positive supply voltage, 2 V to 6 V (nominal 5 V). Quiescent ICC of 80 \u03bcA max at VCC = 6 V. Bypass with a 0.1 \u03bcF ceramic capacitor to GND close to the device (parallel with 1 \u03bcF is common)."+ "description": "Positive supply voltage, 2 V to 6 V (nominal 5 V). Quiescent ICC of 80 μA max at VCC = 6 V. Bypass with a 0.1 μF ceramic capacitor to GND close to the device (parallel with 1 μF is common)." } ], "provenance": {@@ -248,5 +248,8 @@ "docs/sn74hc251pw-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ]+ ],+ "visibility": {+ "public": true+ } }