component

SN74HC244QPWRQ1

Public Made by Adom

by adom

Texas Instruments Buffers / Drivers, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogic icssn74hc244qpwrq1factory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
sn74hc244qpwrq1 / README.md
History Download
Ray Publish 0.1.0 0eb3753 8d ago

SN74HC244QPWRQ1

Texas Instruments · Buffers / Drivers · TSSOP-20

SN74HC244QPWRQ1 from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OE input Active-low output enable for the first 4-bit buffer; low passes 1A data to 1Y, high puts 1Y1-1Y4 in high impedance.
2 1A1 input Buffer input A1 of group 1, noninverting to 1Y1 when 1OE is low.
3 2Y4 tri_state 3-state buffer output Y4 of group 2, follows 2A4 when 2OE is low and is high impedance when 2OE is high.
4 1A2 input Buffer input A2 of group 1, noninverting to 1Y2 when 1OE is low.
5 2Y3 tri_state 3-state buffer output Y3 of group 2, follows 2A3 when 2OE is low and is high impedance when 2OE is high.
6 1A3 input Buffer input A3 of group 1, noninverting to 1Y3 when 1OE is low.
7 2Y2 tri_state 3-state buffer output Y2 of group 2, follows 2A2 when 2OE is low and is high impedance when 2OE is high.
8 1A4 input Buffer input A4 of group 1, noninverting to 1Y4 when 1OE is low.
9 2Y1 tri_state 3-state buffer output Y1 of group 2, follows 2A1 when 2OE is low and is high impedance when 2OE is high.
10 GND power_in Ground pin; unused inputs must be tied to VCC or GND.
11 2A1 input Buffer input A1 of group 2, noninverting to 2Y1 when 2OE is low.
12 1Y4 tri_state 3-state buffer output Y4 of group 1, follows 1A4 when 1OE is low and is high impedance when 1OE is high.
13 2A2 input Buffer input A2 of group 2, noninverting to 2Y2 when 2OE is low.
14 1Y3 tri_state 3-state buffer output Y3 of group 1, follows 1A3 when 1OE is low and is high impedance when 1OE is high.
15 2A3 input Buffer input A3 of group 2, noninverting to 2Y3 when 2OE is low.
16 1Y2 tri_state 3-state buffer output Y2 of group 1, follows 1A2 when 1OE is low and is high impedance when 1OE is high.
17 2A4 input Buffer input A4 of group 2, noninverting to 2Y4 when 2OE is low.
18 1Y1 tri_state 3-state buffer output Y1 of group 1, follows 1A1 when 1OE is low and is high impedance when 1OE is high.
19 2OE input Active-low output enable for the second 4-bit buffer; low passes 2A data to 2Y, high puts 2Y1-2Y4 in high impedance.
20 VCC power_in Supply pin, 2 V to 6 V recommended operating range (absolute maximum 7 V); a 0.1-µF bypass capacitor close to the pin is recommended.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-20
Category Logic ICs
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage range VCC -0.5 7 V 4
Input clamp current IIK -20 20 mA VI < 0 or VI > VCC 4
Output clamp current IOK -20 20 mA VO < 0 or VO > VCC 4
Continuous output current IO -35 35 mA VO = 0 to VCC 4
Continuous current through VCC or GND -70 70 mA 4
Junction temperature TJ 150 °C 4
Storage temperature range Tstg -65 150 °C 4
Supply voltage VCC 2 5 6 V 4
High-level input voltage VIH 1.5 V VCC = 2 V 4
High-level input voltage VIH 3.15 V VCC = 4.5 V 4
High-level input voltage VIH 4.2 V VCC = 6 V 4
Low-level input voltage VIL 0.5 V VCC = 2 V 4
Low-level input voltage VIL 1.35 V VCC = 4.5 V 4
Low-level input voltage VIL 1.8 V VCC = 6 V 4
Input voltage VI 0 6 V 0 to VCC 4
Output voltage VO 0 6 V 0 to VCC 4
Input transition (rise and fall) time tt 1000 ns VCC = 2 V 4
Input transition (rise and fall) time tt 500 ns VCC = 4.5 V 4
Input transition (rise and fall) time tt 400 ns VCC = 6 V 4
Operating free-air temperature TA -40 125 °C 4
Junction-to-ambient thermal resistance RθJA 131.8 °C/W PW (TSSOP) 20 pins 4
Junction-to-case (top) thermal resistance RθJC(top) 72.2 °C/W PW (TSSOP) 20 pins 4
Junction-to-board thermal resistance RθJB 82.8 °C/W PW (TSSOP) 20 pins 4
Junction-to-top characterization parameter ψJT 21.5 °C/W PW (TSSOP) 20 pins 4
Junction-to-board characterization parameter ψJB 82.4 °C/W PW (TSSOP) 20 pins 4
High-level output voltage VOH 1.9 1.998 V VI = VIH or VIL, IOH = −20 μA, VCC = 2 V 5
High-level output voltage VOH 4.4 4.499 V VI = VIH or VIL, IOH = −20 μA, VCC = 4.5 V 5
High-level output voltage VOH 5.9 5.999 V VI = VIH or VIL, IOH = −20 μA, VCC = 6 V 5
High-level output voltage VOH 3.7 4.3 V VI = VIH or VIL, IOH = −6 mA, VCC = 4.5 V 5
High-level output voltage VOH 5.2 5.8 V VI = VIH or VIL, IOH = −7.8 mA, VCC = 6 V 5
Low-level output voltage VOL 0.002 0.1 V VI = VIH or VIL, IOL = 20 μA, VCC = 2 V 5
Low-level output voltage VOL 0.001 0.1 V VI = VIH or VIL, IOL = 20 μA, VCC = 4.5 V 5
Low-level output voltage VOL 0.17 0.4 V VI = VIH or VIL, IOL = 6 mA, VCC = 4.5 V 5
Low-level output voltage VOL 0.15 0.4 V VI = VIH or VIL, IOL = 7.8 mA, VCC = 6 V 5
Input leakage current II -1000 1000 nA VI = VCC or 0, VCC = 6 V 5
Off-state output current IOZ -10 10 μA VO = VCC or 0, VI = VIH or VIL, VCC = 6 V 5
Supply current ICC 160 μA VI = VCC or 0, IO = 0, VCC = 6 V 5
Input capacitance Ci 3 10 pF VCC = 2 V to 6 V 5
Propagation delay A to Y tpd 40 170 ns CL = 50 pF, VCC = 2 V 5
Propagation delay A to Y tpd 13 34 ns CL = 50 pF, VCC = 4.5 V 5
Propagation delay A to Y tpd 11 29 ns CL = 50 pF, VCC = 6 V 5
Enable time OE to Y ten 75 225 ns CL = 50 pF, VCC = 2 V 5
Enable time OE to Y ten 15 45 ns CL = 50 pF, VCC = 4.5 V 5
Enable time OE to Y ten 13 38 ns CL = 50 pF, VCC = 6 V 5
Disable time OE to Y tdis 75 225 ns CL = 50 pF, VCC = 2 V 5
Disable time OE to Y tdis 15 45 ns CL = 50 pF, VCC = 4.5 V 5
Disable time OE to Y tdis 13 38 ns CL = 50 pF, VCC = 6 V 5
Output transition time Y tt 28 90 ns CL = 50 pF, VCC = 2 V 5
Output transition time Y tt 8 18 ns CL = 50 pF, VCC = 4.5 V 5
Output transition time Y tt 6 15 ns CL = 50 pF, VCC = 6 V 5
Power dissipation capacitance per buffer/driver Cpd 35 pF No load, TA = 25℃ 5

CAD (KiCad official)

  • Symbol: SN74HC244QPWRQ1
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: sn74hc244qpwrq1-etched.step / sn74hc244qpwrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74hc244qpwrq1.step / sn74hc244qpwrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (21 pp, sha256 3ca1c15c2a0b3f05, retrieved 2026-10-23, tier: manufacturer)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF