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SN74HC244PW

Public Made by Adom

by adom

lingxingic Buffers, Drivers, Receivers, Transceivers, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SN74HC244PW

lingxingic · Buffers, Drivers, Receivers, Transceivers · TSSOP-20

SN74HC244PW from lingxingic, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OE input Active-low output enable for outputs 1Y0 to 1Y3; when high, the outputs go to high impedance (Z).
2 1A0 input Data input of the first 4-bit buffer; input clamp diodes are built in, so a series resistor can connect the input to a voltage above VCC.
3 2Y0 tri_state Non-inverting three-state bus output of the second buffer; high impedance when 2OE is high, and output current is limited to ±35 mA.
4 1A1 input Data input of the first 4-bit buffer; input clamp diodes are built in, so a series resistor can connect the input to a voltage above VCC.
5 2Y1 tri_state Non-inverting three-state bus output of the second buffer; high impedance when 2OE is high, and output current is limited to ±35 mA.
6 1A2 input Data input of the first 4-bit buffer; input clamp diodes are built in, so a series resistor can connect the input to a voltage above VCC.
7 2Y2 tri_state Non-inverting three-state bus output of the second buffer; high impedance when 2OE is high, and output current is limited to ±35 mA.
8 1A3 input Data input of the first 4-bit buffer; input clamp diodes are built in, so a series resistor can connect the input to a voltage above VCC.
9 2Y3 tri_state Non-inverting three-state bus output of the second buffer; high impedance when 2OE is high, and output current is limited to ±35 mA.
10 GND power_in Ground reference (0 V).
11 2A3 input Data input of the second 4-bit buffer; input clamp diodes are built in, so a series resistor can connect the input to a voltage above VCC.
12 1Y3 tri_state Non-inverting three-state bus output of the first buffer; high impedance when 1OE is high, and output current is limited to ±35 mA.
13 2A2 input Data input of the second 4-bit buffer; input clamp diodes are built in, so a series resistor can connect the input to a voltage above VCC.
14 1Y2 tri_state Non-inverting three-state bus output of the first buffer; high impedance when 1OE is high, and output current is limited to ±35 mA.
15 2A1 input Data input of the second 4-bit buffer; input clamp diodes are built in, so a series resistor can connect the input to a voltage above VCC.
16 1Y1 tri_state Non-inverting three-state bus output of the first buffer; high impedance when 1OE is high, and output current is limited to ±35 mA.
17 2A0 input Data input of the second 4-bit buffer; input clamp diodes are built in, so a series resistor can connect the input to a voltage above VCC.
18 1Y0 tri_state Non-inverting three-state bus output of the first buffer; high impedance when 1OE is high, and output current is limited to ±35 mA.
19 2OE input Active-low output enable for outputs 2Y0 to 2Y3; when high, the outputs go to high impedance (Z).
20 VCC power_in Supply voltage; the SN74HC244 operates from 2.0 V to 6.0 V with an absolute maximum of 7.0 V.

Key specifications

Parameter Value
Manufacturer lingxingic
Package TSSOP-20
Category Logic
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.5 7 V 6
Input clamp current IIK -20 20 mA VI<-0.5V 或 VI>VCC+0.5V 6
Output clamp current IOK -20 20 mA VO<-0.5V 或 VO>VCC+0.5V 6
Output current IO -35 35 mA -0.5V<VO<VCC+0.5V 6
Supply current ICC 70 mA 6
Ground current IGND -70 mA 6
Storage temperature Tstg -65 150 ℃ 6
Total power dissipation Ptot 500 mW 6
Soldering temperature (SOP/TSSOP/SOP(M)) TL 260 ℃ 10 秒; SOP/TSSOP/SOP(M) 6
Supply voltage (SN74HC244) VCC 2 5 6 V 6
Input voltage VI 0 V 6
Output voltage VO 0 V 6
Input rise and fall rate Δt/ΔV 625 ns/V VCC=2.0V 6
Input rise and fall rate Δt/ΔV 1.67 139 ns/V VCC=4.5V 6
Input rise and fall rate Δt/ΔV 83 ns/V VCC=6.0V 6
Operating ambient temperature Tamb -40 125 ℃ 6
High-level input voltage VIH 1.5 V VCC=2.0V 9
High-level input voltage VIH 3.15 V VCC=4.5V 9
High-level input voltage VIH 4.2 V VCC=6.0V 9
Low-level input voltage VIL 0.5 V VCC=2.0V 9
Low-level input voltage VIL 1.35 V VCC=4.5V 9
Low-level input voltage VIL 1.8 V VCC=6.0V 9
High-level output voltage VOH 1.9 V IO=-20uA；VCC=2.0V 9
High-level output voltage VOH 4.4 V IO=-20uA；VCC=4.5V 9
High-level output voltage VOH 5.9 V IO=-20uA；VCC=6.0V 9
High-level output voltage VOH 3.7 V IO=-6.0mA；VCC=4.5V 9
High-level output voltage VOH 5.2 V IO=-7.8mA；VCC=6.0V 9
Low-level output voltage VOL 0.1 V IO=20uA；VCC=2.0V 9
Low-level output voltage VOL 0.4 V IO=6.0mA；VCC=4.5V 9
Input leakage current II -1 1 uA VI=VCC或GND；VCC=6.0V 9
Off-state output current IOZ -10 10 uA VI=VIH或VIL；VCC=6.0V；VO=VCC或GND 9
Quiescent supply current ICC 160 uA VI=VCC或GND；IO=0A；VCC=6.0V 9
Propagation delay nAn to nYn tpd 165 ns VCC=2.0V 12
Propagation delay nAn to nYn tpd 33 ns VCC=4.5V 12
Propagation delay nAn to nYn tpd 28 ns VCC=6.0V 12
Output enable time nOE to nYn ten 225 ns VCC=2.0V 12
Output enable time nOE to nYn ten 45 ns VCC=4.5V 12
Output enable time nOE to nYn ten 38 ns VCC=6.0V 12
Output disable time nOE to nYn tdis 225 ns VCC=2.0V 12
Output disable time nOE to nYn tdis 45 ns VCC=4.5V 12
Output disable time nOE to nYn tdis 38 ns VCC=6.0V 12
Output transition time tt 90 ns VCC=2.0V 12
Output transition time tt 18 ns VCC=4.5V 12
Output transition time tt 15 ns VCC=6.0V 12
Propagation delay nAn to nYn tpd 30 110 ns VCC=2.0V 10
Propagation delay nAn to nYn tpd 11 22 ns VCC=4.5V 10
Propagation delay nAn to nYn tpd 9 19 ns VCC=6.0V 10
Output enable time nOE to nYn ten 36 150 ns VCC=2.0V 10
Output enable time nOE to nYn ten 13 30 ns VCC=4.5V 10
Output enable time nOE to nYn ten 10 26 ns VCC=6.0V 10
Output disable time nOE to nYn tdis 39 150 ns VCC=2.0V 10
Output disable time nOE to nYn tdis 14 30 ns VCC=4.5V 10
Output disable time nOE to nYn tdis 11 26 ns VCC=6.0V 10
Output transition time tt 14 60 ns VCC=2.0V 10
Output transition time tt 5 12 ns VCC=4.5V 10
Output transition time tt 4 10 ns VCC=6.0V 10

CAD (KiCad official)

  • Symbol: SN74HC244PW
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: sn74hc244pw-etched.step / sn74hc244pw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74hc244pw.step / sn74hc244pw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: lingxingic datasheet (19 pp, sha256 56daa4e3385f582a, retrieved 2026-10-19, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF