component
SN74HC244DW
Public Made by Adomby adom
Texas Instruments Buffers, Drivers, Receivers, Transceivers, SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SN74HC244DW
Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SOIC-20-300mil
SN74HC244DW from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Active-low output enable for bank 1: when low, outputs 1Y1 to 1Y4 follow 1A1 to 1A4, and when high, they go to the high-impedance state. |
| 2 | 1A1 | input | Data input for bank 1, channel 1, non-inverting to 1Y1 when 1OE is low; it is a standard CMOS input and must not be left floating. |
| 3 | 2Y4 | tri_state | Three-state output of bank 2, channel 4, non-inverting copy of 2A4 when 2OE is low and high-impedance when 2OE is high; it must not be pulled above VCC. |
| 4 | 1A2 | input | Data input for bank 1, channel 2, non-inverting to 1Y2 when 1OE is low; it is a standard CMOS input and must not be left floating. |
| 5 | 2Y3 | tri_state | Three-state output of bank 2, channel 3, non-inverting copy of 2A3 when 2OE is low and high-impedance when 2OE is high; it must not be pulled above VCC. |
| 6 | 1A3 | input | Data input for bank 1, channel 3, non-inverting to 1Y3 when 1OE is low; it is a standard CMOS input and must not be left floating. |
| 7 | 2Y2 | tri_state | Three-state output of bank 2, channel 2, non-inverting copy of 2A2 when 2OE is low and high-impedance when 2OE is high; it must not be pulled above VCC. |
| 8 | 1A4 | input | Data input for bank 1, channel 4, non-inverting to 1Y4 when 1OE is low; it is a standard CMOS input and must not be left floating. |
| 9 | 2Y1 | tri_state | Three-state output of bank 2, channel 1, non-inverting copy of 2A1 when 2OE is low and high-impedance when 2OE is high; it must not be pulled above VCC. |
| 10 | GND | power_in | Ground reference pin for the device. |
| 11 | 2A1 | input | Data input for bank 2, channel 1, non-inverting to 2Y1 when 2OE is low; it is a standard CMOS input and must not be left floating. |
| 12 | 1Y4 | tri_state | Three-state output of bank 1, channel 4, non-inverting copy of 1A4 when 1OE is low and high-impedance when 1OE is high; it must not be pulled above VCC. |
| 13 | 2A2 | input | Data input for bank 2, channel 2, non-inverting to 2Y2 when 2OE is low; it is a standard CMOS input and must not be left floating. |
| 14 | 1Y3 | tri_state | Three-state output of bank 1, channel 3, non-inverting copy of 1A3 when 1OE is low and high-impedance when 1OE is high; it must not be pulled above VCC. |
| 15 | 2A3 | input | Data input for bank 2, channel 3, non-inverting to 2Y3 when 2OE is low; it is a standard CMOS input and must not be left floating. |
| 16 | 1Y2 | tri_state | Three-state output of bank 1, channel 2, non-inverting copy of 1A2 when 1OE is low and high-impedance when 1OE is high; it must not be pulled above VCC. |
| 17 | 2A4 | input | Data input for bank 2, channel 4, non-inverting to 2Y4 when 2OE is low; it is a standard CMOS input and must not be left floating. |
| 18 | 1Y1 | tri_state | Three-state output of bank 1, channel 1, non-inverting copy of 1A1 when 1OE is low and high-impedance when 1OE is high; it must not be pulled above VCC. |
| 19 | 2OE | input | Active-low output enable for bank 2: when low, outputs 2Y1 to 2Y4 follow 2A1 to 2A4, and when high, they go to the high-impedance state. |
| 20 | VCC | power_in | Supply pin; recommended supply range is 2 V to 6 V, with an absolute maximum of 7 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-20-300mil |
| Category | Logic |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
SN74HC244DW - Footprint:
Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm - 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
- 3D model files:
sn74hc244dw-etched.step/sn74hc244dw-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74hc244dw.step/sn74hc244dw.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (41 pp, sha256
75f58a56722eea30, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SN74HC244DW
**Texas Instruments** · Buffers, Drivers, Receivers, Transceivers · SOIC-20-300mil
SN74HC244DW from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Active-low output enable for bank 1: when low, outputs 1Y1 to 1Y4 follow 1A1 to 1A4, and when high, they go to the high-impedance state. |
| 2 | 1A1 | input | Data input for bank 1, channel 1, non-inverting to 1Y1 when 1OE is low; it is a standard CMOS input and must not be left floating. |
| 3 | 2Y4 | tri_state | Three-state output of bank 2, channel 4, non-inverting copy of 2A4 when 2OE is low and high-impedance when 2OE is high; it must not be pulled above VCC. |
| 4 | 1A2 | input | Data input for bank 1, channel 2, non-inverting to 1Y2 when 1OE is low; it is a standard CMOS input and must not be left floating. |
| 5 | 2Y3 | tri_state | Three-state output of bank 2, channel 3, non-inverting copy of 2A3 when 2OE is low and high-impedance when 2OE is high; it must not be pulled above VCC. |
| 6 | 1A3 | input | Data input for bank 1, channel 3, non-inverting to 1Y3 when 1OE is low; it is a standard CMOS input and must not be left floating. |
| 7 | 2Y2 | tri_state | Three-state output of bank 2, channel 2, non-inverting copy of 2A2 when 2OE is low and high-impedance when 2OE is high; it must not be pulled above VCC. |
| 8 | 1A4 | input | Data input for bank 1, channel 4, non-inverting to 1Y4 when 1OE is low; it is a standard CMOS input and must not be left floating. |
| 9 | 2Y1 | tri_state | Three-state output of bank 2, channel 1, non-inverting copy of 2A1 when 2OE is low and high-impedance when 2OE is high; it must not be pulled above VCC. |
| 10 | GND | power_in | Ground reference pin for the device. |
| 11 | 2A1 | input | Data input for bank 2, channel 1, non-inverting to 2Y1 when 2OE is low; it is a standard CMOS input and must not be left floating. |
| 12 | 1Y4 | tri_state | Three-state output of bank 1, channel 4, non-inverting copy of 1A4 when 1OE is low and high-impedance when 1OE is high; it must not be pulled above VCC. |
| 13 | 2A2 | input | Data input for bank 2, channel 2, non-inverting to 2Y2 when 2OE is low; it is a standard CMOS input and must not be left floating. |
| 14 | 1Y3 | tri_state | Three-state output of bank 1, channel 3, non-inverting copy of 1A3 when 1OE is low and high-impedance when 1OE is high; it must not be pulled above VCC. |
| 15 | 2A3 | input | Data input for bank 2, channel 3, non-inverting to 2Y3 when 2OE is low; it is a standard CMOS input and must not be left floating. |
| 16 | 1Y2 | tri_state | Three-state output of bank 1, channel 2, non-inverting copy of 1A2 when 1OE is low and high-impedance when 1OE is high; it must not be pulled above VCC. |
| 17 | 2A4 | input | Data input for bank 2, channel 4, non-inverting to 2Y4 when 2OE is low; it is a standard CMOS input and must not be left floating. |
| 18 | 1Y1 | tri_state | Three-state output of bank 1, channel 1, non-inverting copy of 1A1 when 1OE is low and high-impedance when 1OE is high; it must not be pulled above VCC. |
| 19 | 2OE | input | Active-low output enable for bank 2: when low, outputs 2Y1 to 2Y4 follow 2A1 to 2A4, and when high, they go to the high-impedance state. |
| 20 | VCC | power_in | Supply pin; recommended supply range is 2 V to 6 V, with an absolute maximum of 7 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-20-300mil |
| Category | Logic |
| Pins | 20 |
## CAD (KiCad official)
- Symbol: `SN74HC244DW`
- Footprint: `Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm`
- 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
- 3D model files: `sn74hc244dw-etched.step` / `sn74hc244dw-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74hc244dw.step` / `sn74hc244dw.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn74hc244) (41 pp, sha256 `75f58a56722eea30`, retrieved 2026-10-08, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sn74hc244dw-datasheet.pdf)