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SN74HC244 Octal Buffer

Public Made by Adom

by adom

Octal buffer and line driver with 3-state outputs, organized as two 4-bit groups.

logicbufferline-driver3-state74hctisoic-20
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Made with kicad-footprint-generator 10.0 · KiCad file format 20260206
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docs sn74hc244: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers interactive viewers · Ray
package.json Publish 0.1.0 · Ray
page.json sn74hc244: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md sn74hc244: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray
sn74hc244-etched.fit.json sn74hc244: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
sn74hc244-etched.glb sn74hc244: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
sn74hc244-etched.step sn74hc244: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
SN74HC244.adom-lbr.json SN74HC244: validated Fusion/EAGLE library + adom-lbr hub, generated from this page's KiCad sources · Ray
sn74hc244.glb Publish 0.1.0 · Ray
sn74hc244.kicad_mod Publish 0.1.0 · Ray
sn74hc244.kicad_sym Publish 0.1.0 · Ray
sn74hc244.lbr add validated EAGLE .lbr (Fusion library) · Ray
SN74HC244.lbr SN74HC244: validated Fusion/EAGLE library + adom-lbr hub, generated from this page's KiCad sources · Ray
sn74hc244.step add .step (Fusion 3D source) · Ray

SN74HC244

Texas Instruments · Buffer / Line Driver · SOIC-20

The SN74HC244 is an octal buffer and line driver built for 3-state bus interfacing. Its eight buffers are arranged as two 4-bit groups, each with its own active-low output-enable, so it can drive or isolate two nibble-wide buses independently.

Pinout

Pin Name Type Function
1 1OE input Active-low output enable for the first 4-bit buffer (drives 1Y1..1Y4). When low, 1Y outputs follow 1A inputs; when high, 1Y outputs are placed in the high-impedance (3-state) state.
2 1A1 input Data input 1 for the first 4-bit buffer. Buffered noninverted to output 1Y1 when 1OE is low.
3 2Y4 tri_state 3-state buffered output 4 of the second 4-bit buffer. Follows input 2A4 when 2OE is low; Hi-Z when 2OE is high. Drives ±6mA at VCC = 5V.
4 1A2 input Data input 2 for the first 4-bit buffer. Buffered noninverted to output 1Y2 when 1OE is low.
5 2Y3 tri_state 3-state buffered output 3 of the second 4-bit buffer. Follows input 2A3 when 2OE is low; Hi-Z when 2OE is high.
6 1A3 input Data input 3 for the first 4-bit buffer. Buffered noninverted to output 1Y3 when 1OE is low.
7 2Y2 tri_state 3-state buffered output 2 of the second 4-bit buffer. Follows input 2A2 when 2OE is low; Hi-Z when 2OE is high.
8 1A4 input Data input 4 for the first 4-bit buffer. Buffered noninverted to output 1Y4 when 1OE is low.
9 2Y1 tri_state 3-state buffered output 1 of the second 4-bit buffer. Follows input 2A1 when 2OE is low; Hi-Z when 2OE is high.
10 GND power_in Device ground reference (0 V). Bond directly to the board ground plane.
11 2A1 input Data input 1 for the second 4-bit buffer. Buffered noninverted to output 2Y1 when 2OE is low.
12 1Y4 tri_state 3-state buffered output 4 of the first 4-bit buffer. Follows input 1A4 when 1OE is low; Hi-Z when 1OE is high.
13 2A2 input Data input 2 for the second 4-bit buffer. Buffered noninverted to output 2Y2 when 2OE is low.
14 1Y3 tri_state 3-state buffered output 3 of the first 4-bit buffer. Follows input 1A3 when 1OE is low; Hi-Z when 1OE is high.
15 2A3 input Data input 3 for the second 4-bit buffer. Buffered noninverted to output 2Y3 when 2OE is low.
16 1Y2 tri_state 3-state buffered output 2 of the first 4-bit buffer. Follows input 1A2 when 1OE is low; Hi-Z when 1OE is high.
17 2A4 input Data input 4 for the second 4-bit buffer. Buffered noninverted to output 2Y4 when 2OE is low.
18 1Y1 tri_state 3-state buffered output 1 of the first 4-bit buffer. Follows input 1A1 when 1OE is low; Hi-Z when 1OE is high.
19 2OE input Active-low output enable for the second 4-bit buffer (drives 2Y1..2Y4). When low, 2Y outputs follow 2A inputs; when high, 2Y outputs are placed in the high-impedance (3-state) state.
20 VCC power_in Positive supply voltage, 2 V to 6 V (5 V nominal). ICC = 80 µA max. Decouple locally to GND with a 0.1 µF ceramic capacitor.

Key specifications

Parameter Value
Type Octal buffer / line driver, 3-state
Logic family 74HC (CMOS)
Supply voltage 2 V to 6 V
Outputs 8, 3-state, two 4-bit banks
Output current +-6 mA at VCC = 4.5 V
Propagation delay 11 ns typ at 5 V
Operating temperature -40 C to 85 C

Ordering variants

Same part, different packaging or reel option.

  • SN74HC244DW
  • SN74HC244DWR
  • SN74HC244DB
  • SN74HC244DBR
  • SN74HC244PW
  • SN74HC244PWR
  • SN74HC244N
  • SN74HC244NS
  • SN74HC244NSR
  • SN74HC244FK
  • SN74HC244J
  • SN74HC244W

CAD (KiCad official)

  • Symbol: sn74hc244.kicad_sym
  • Footprint: sn74hc244.kicad_mod
  • 3D model: SOIC-20 wide body from KiCad Package_SO/SOIC-20W_7.5x12.8mm_P1.27mm.
  • 3D model files: sn74hc244-etched.step / sn74hc244-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74hc244.step / sn74hc244.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (42 pp, sha256 89be5869d39fe0cb, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF