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SN74HC241DWR

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SOIC-20-300mil

SN74HC241DWR from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OE input Active-low output enable for buffers 1A1-1A4; outputs 1Y1-1Y4 are passed when low and high-impedance when high.
2 1A1 input Buffer 1 data input A1, passed noninverted to 1Y1 when 1OE is low.
3 2Y4 tri_state Buffer 2 output Y4, noninverted from 2A4 when 2OE is high and high-impedance when 2OE is low.
4 1A2 input Buffer 1 data input A2, passed noninverted to 1Y2 when 1OE is low.
5 2Y3 tri_state Buffer 2 output Y3, noninverted from 2A3 when 2OE is high and high-impedance when 2OE is low.
6 1A3 input Buffer 1 data input A3, passed noninverted to 1Y3 when 1OE is low.
7 2Y2 tri_state Buffer 2 output Y2, noninverted from 2A2 when 2OE is high and high-impedance when 2OE is low.
8 1A4 input Buffer 1 data input A4, passed noninverted to 1Y4 when 1OE is low.
9 2Y1 tri_state Buffer 2 output Y1, noninverted from 2A1 when 2OE is high and high-impedance when 2OE is low.
10 GND power_in Ground reference for the device.
11 2A1 input Buffer 2 data input A1, passed noninverted to 2Y1 when 2OE is high.
12 1Y4 tri_state Buffer 1 output Y4, noninverted from 1A4 when 1OE is low and high-impedance when 1OE is high.
13 2A2 input Buffer 2 data input A2, passed noninverted to 2Y2 when 2OE is high.
14 1Y3 tri_state Buffer 1 output Y3, noninverted from 1A3 when 1OE is low and high-impedance when 1OE is high.
15 2A3 input Buffer 2 data input A3, passed noninverted to 2Y3 when 2OE is high.
16 1Y2 tri_state Buffer 1 output Y2, noninverted from 1A2 when 1OE is low and high-impedance when 1OE is high.
17 2A4 input Buffer 2 data input A4, passed noninverted to 2Y4 when 2OE is high.
18 1Y1 tri_state Buffer 1 output Y1, noninverted from 1A1 when 1OE is low and high-impedance when 1OE is high.
19 2OE input Active-high output enable for buffers 2A1-2A4; outputs 2Y1-2Y4 are passed when high and high-impedance when low.
20 VCC power_in Supply voltage, 2 V to 6 V recommended, with a 0.1-µF bypass capacitor recommended close to the pin.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-20-300mil
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: SN74HC241DWR
  • Footprint: Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm
  • 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
  • 3D model files: sn74hc241dwr-etched.step / sn74hc241dwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74hc241dwr.step / sn74hc241dwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (26 pp, sha256 2d45e159fd054477, retrieved 2026-10-11, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF