component
SN74HC240PWR
Public Made by Adomby adom
Texas Instruments Buffers, Drivers, Receivers, Transceivers, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads on click. Unloads only if this page sits in the background.
PCB Footprint
Open full view ↗Loads on click. Unloads only if this page sits in the background.
Datasheet
Open in new tab ↗Loads on click. Unloads only if this page sits in the background.
README
markdownSN74HC240PWR
Texas Instruments · Buffers, Drivers, Receivers, Transceivers · TSSOP-20
SN74HC240PWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Output enable input for first buffer; active low control enabling inverted outputs while high impedance state occurs when pin is high. |
| 2 | 1A1 | input | Data input to first stage of first 4-bit buffer. |
| 3 | 2Y4 | tri_state | Inverted data output from fourth stage of second buffer; 3-state output. |
| 4 | 1A2 | input | Data input to second stage of first 4-bit buffer. |
| 5 | 2Y3 | tri_state | Inverted data output from third stage of second buffer; 3-state output. |
| 6 | 1A3 | input | Data input to third stage of first 4-bit buffer. |
| 7 | 2Y2 | tri_state | Inverted data output from second stage of second buffer; 3-state output. |
| 8 | 1A4 | input | Data input to fourth stage of first 4-bit buffer. |
| 9 | 2Y1 | tri_state | Inverted data output from first stage of second buffer; 3-state output. |
| 10 | GND | power_in | Ground reference pin. |
| 11 | 2A1 | input | Data input to first stage of second 4-bit buffer. |
| 12 | 1Y4 | tri_state | Inverted data output from fourth stage of first buffer; 3-state output. |
| 13 | 2A2 | input | Data input to second stage of second 4-bit buffer. |
| 14 | 1Y3 | tri_state | Inverted data output from third stage of first buffer; 3-state output. |
| 15 | 2A3 | input | Data input to third stage of second 4-bit buffer. |
| 16 | 1Y2 | tri_state | Inverted data output from second stage of first buffer; 3-state output. |
| 17 | 2A4 | input | Data input to fourth stage of second 4-bit buffer. |
| 18 | 1Y1 | tri_state | Inverted data output from first stage of first buffer; 3-state output. |
| 19 | 2OE | input | Output enable input for second buffer; active low control enabling inverted outputs while high impedance state occurs when pin is high. |
| 20 | VCC | power_in | Positive supply voltage pin; 2V to 6V operating range. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-20 |
| Category | Logic |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
SN74HC240PWR - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
sn74hc240pwr-etched.step/sn74hc240pwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74hc240pwr.step/sn74hc240pwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (35 pp, sha256
cae4339d4d335f27, retrieved 2026-09-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).