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Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

SN74HC240DWR

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SOIC-20-300mil

SN74HC240DWR from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	1OE	input	Output Enable 1 input; when low enables buffered outputs 1Y1-1Y4, when high outputs are high-impedance.
2	1A1	input	Buffer 1 input A1; data input for 4-bit buffer 1, inverted to output 1Y1.
3	2Y4	tri_state	Buffer 2 output Y4; inverted output from input 2A4, controlled by output enable 2OE.
4	1A2	input	Buffer 1 input A2; data input for 4-bit buffer 1, inverted to output 1Y2.
5	2Y3	tri_state	Buffer 2 output Y3; inverted output from input 2A3, controlled by output enable 2OE.
6	1A3	input	Buffer 1 input A3; data input for 4-bit buffer 1, inverted to output 1Y3.
7	2Y2	tri_state	Buffer 2 output Y2; inverted output from input 2A2, controlled by output enable 2OE.
8	1A4	input	Buffer 1 input A4; data input for 4-bit buffer 1, inverted to output 1Y4.
9	2Y1	tri_state	Buffer 2 output Y1; inverted output from input 2A1, controlled by output enable 2OE.
10	GND	power_in	Ground reference pin.
11	2A1	input	Buffer 2 input A1; data input for 4-bit buffer 2, inverted to output 2Y1.
12	1Y4	tri_state	Buffer 1 output Y4; inverted output from input 1A4, controlled by output enable 1OE.
13	2A2	input	Buffer 2 input A2; data input for 4-bit buffer 2, inverted to output 2Y2.
14	1Y3	tri_state	Buffer 1 output Y3; inverted output from input 1A3, controlled by output enable 1OE.
15	2A3	input	Buffer 2 input A3; data input for 4-bit buffer 2, inverted to output 2Y3.
16	1Y2	tri_state	Buffer 1 output Y2; inverted output from input 1A2, controlled by output enable 1OE.
17	2A4	input	Buffer 2 input A4; data input for 4-bit buffer 2, inverted to output 2Y4.
18	1Y1	tri_state	Buffer 1 output Y1; inverted output from input 1A1, controlled by output enable 1OE.
19	2OE	input	Output Enable 2 input; when low enables buffered outputs 2Y1-2Y4, when high outputs are high-impedance.
20	VCC	power_in	Supply voltage pin; operates at 2V to 6V per recommended operating conditions on page 4.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOIC-20-300mil
Category	Logic
Pins	20

CAD (KiCad official)

Symbol: SN74HC240DWR
Footprint: Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm
3D model: SOIC-20-300mil (KiCad packages3D, STEP)
3D model files: sn74hc240dwr-etched.step / sn74hc240dwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74hc240dwr.step / sn74hc240dwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (34 pp, sha256 1697bd80b90489f0, retrieved 2026-10-06, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF