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SN74HC21QPWRG4Q1
Public Made by Adomby adom
Texas Instruments Logic Gates, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74HC21QPWRG4Q1
Texas Instruments · Logic Gates · TSSOP-14
SN74HC21QPWRG4Q1 from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Input A of gate 1; the gate performs Y = A • B • C • D in positive logic, and input current is 1 µA max. |
| 2 | 1B | input | Input B of gate 1; the gate performs Y = A • B • C • D in positive logic, and input current is 1 µA max. |
| 3 | NC | unconnected | No internal connection. |
| 4 | 1C | input | Input C of gate 1; the gate performs Y = A • B • C • D in positive logic, and input current is 1 µA max. |
| 5 | 1D | input | Input D of gate 1; the gate performs Y = A • B • C • D in positive logic, and input current is 1 µA max. |
| 6 | 1Y | output | Output of gate 1; can drive up to ten LSTTL loads with ±4 mA output drive at 5 V. |
| 7 | GND | power_in | Ground reference for the device. |
| 8 | 2Y | output | Output of gate 2; can drive up to ten LSTTL loads with ±4 mA output drive at 5 V. |
| 9 | 2A | input | Input A of gate 2; the gate performs Y = A • B • C • D in positive logic, and input current is 1 µA max. |
| 10 | 2B | input | Input B of gate 2; the gate performs Y = A • B • C • D in positive logic, and input current is 1 µA max. |
| 11 | NC | unconnected | No internal connection. |
| 12 | 2C | input | Input C of gate 2; the gate performs Y = A • B • C • D in positive logic, and input current is 1 µA max. |
| 13 | 2D | input | Input D of gate 2; the gate performs Y = A • B • C • D in positive logic, and input current is 1 µA max. |
| 14 | VCC | power_in | Supply voltage, 2 V to 6 V wide operating range. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage range | VCC | -0.5 | 7 | V | 2 | ||
| Input clamp current | IIK | -20 | 20 | mA | VI < 0 or VI > VCC | 2 | |
| Output clamp current | IOK | -20 | 20 | mA | VO < 0 or VO > VCC | 2 | |
| Continuous output current | IO | -25 | 25 | mA | VO = 0 to VCC | 2 | |
| Continuous current through VCC or GND | -50 | 50 | mA | 2 | |||
| Storage temperature range | Tstg | -65 | 150 | °C | 2 | ||
| Supply voltage | VCC | 2 | 5 | 6 | V | 2 | |
| High-level input voltage | VIH | 1.5 | V | VCC = 2 V | 2 | ||
| High-level input voltage | VIH | 3.15 | V | VCC = 4.5 V | 2 | ||
| High-level input voltage | VIH | 4.2 | V | VCC = 6 V | 2 | ||
| Low-level input voltage | VIL | 0.5 | V | VCC = 2 V | 2 | ||
| Low-level input voltage | VIL | 1.35 | V | VCC = 4.5 V | 2 | ||
| Low-level input voltage | VIL | 1.8 | V | VCC = 6 V | 2 | ||
| Input voltage | VI | 0 | V | max = VCC | 2 | ||
| Output voltage | VO | 0 | V | max = VCC | 2 | ||
| Input transition rise/fall time | Δt/Δv | 1000 | ns | VCC = 2 V | 2 | ||
| Input transition rise/fall time | Δt/Δv | 500 | ns | VCC = 4.5 V | 2 | ||
| Input transition rise/fall time | Δt/Δv | 400 | ns | VCC = 6 V | 2 | ||
| Operating free-air temperature | TA | -40 | 125 | °C | 2 | ||
| High-level output voltage | VOH | 1.9 | 1.998 | V | IOH = -20 µA, VI = VIH or VIL, VCC = 2 V, TA = 25°C | 3 | |
| High-level output voltage | VOH | 4.4 | 4.499 | V | IOH = -20 µA, VI = VIH or VIL, VCC = 4.5 V, TA = 25°C | 3 | |
| High-level output voltage | VOH | 5.9 | 5.999 | V | IOH = -20 µA, VI = VIH or VIL, VCC = 6 V, TA = 25°C | 3 | |
| High-level output voltage | VOH | 3.98 | 4.3 | V | IOH = -4 mA, VI = VIH or VIL, VCC = 4.5 V, TA = 25°C | 3 | |
| High-level output voltage | VOH | 3.7 | V | IOH = -4 mA, VI = VIH or VIL, VCC = 4.5 V, TA = -40°C to 125°C | 3 | ||
| High-level output voltage | VOH | 5.48 | 5.8 | V | IOH = -5.2 mA, VI = VIH or VIL, VCC = 6 V, TA = 25°C | 3 | |
| High-level output voltage | VOH | 5.2 | V | IOH = -5.2 mA, VI = VIH or VIL, VCC = 6 V, TA = -40°C to 125°C | 3 | ||
| Low-level output voltage | VOL | 0.002 | 0.1 | V | IOL = 20 µA, VI = VIH or VIL, VCC = 2 V, TA = 25°C | 3 | |
| Low-level output voltage | VOL | 0.1 | V | IOL = 20 µA, VI = VIH or VIL, VCC = 2 V, TA = -40°C to 125°C | 3 | ||
| Low-level output voltage | VOL | 0.001 | 0.1 | V | IOL = 20 µA, VI = VIH or VIL, VCC = 4.5 V, TA = 25°C | 3 | |
| Low-level output voltage | VOL | 0.17 | 0.26 | V | IOL = 4 mA, VI = VIH or VIL, VCC = 4.5 V, TA = 25°C | 3 | |
| Low-level output voltage | VOL | 0.4 | V | IOL = 4 mA, VI = VIH or VIL, VCC = 4.5 V, TA = -40°C to 125°C | 3 | ||
| Low-level output voltage | VOL | 0.15 | 0.26 | V | IOL = 5.2 mA, VI = VIH or VIL, VCC = 6 V, TA = 25°C | 3 | |
| Input current | II | -100 | 0.1 | 100 | nA | VI = VCC or 0, VCC = 6 V, TA = 25°C | 3 |
| Input current | II | -1000 | 1000 | nA | VI = VCC or 0, VCC = 6 V, TA = -40°C to 125°C | 3 | |
| Supply current | ICC | 2 | 40 | µA | VI = VCC or 0, IO = 0, VCC = 6 V, max at TA = -40°C to 125°C | 3 | |
| Supply current | ICC | 20 | µA | VI = VCC or 0, IO = 0, VCC = 6 V, max at TA = -40°C to 85°C | 3 | ||
| Input capacitance | Ci | 3 | 10 | pF | VCC = 2 V to 6 V, TA = 25°C | 3 | |
| Propagation delay time | tpd | 44 | 110 | ns | A, B, C, or D to Y, CL = 50 pF, VCC = 2 V, TA = 25°C | 3 | |
| Propagation delay time | tpd | 165 | ns | A, B, C, or D to Y, CL = 50 pF, VCC = 2 V, TA = -40°C to 125°C | 3 | ||
| Propagation delay time | tpd | 14 | 22 | ns | A, B, C, or D to Y, CL = 50 pF, VCC = 4.5 V, TA = 25°C | 3 | |
| Propagation delay time | tpd | 33 | ns | A, B, C, or D to Y, CL = 50 pF, VCC = 4.5 V, TA = -40°C to 125°C | 3 | ||
| Propagation delay time | tpd | 11 | 19 | ns | A, B, C, or D to Y, CL = 50 pF, VCC = 6 V, TA = 25°C | 3 | |
| Propagation delay time | tpd | 28 | ns | A, B, C, or D to Y, CL = 50 pF, VCC = 6 V, TA = -40°C to 125°C | 3 | ||
| Output transition time | tt | 29 | 75 | ns | Y, CL = 50 pF, VCC = 2 V, TA = 25°C | 3 | |
| Output transition time | tt | 110 | ns | Y, CL = 50 pF, VCC = 2 V, TA = -40°C to 125°C | 3 | ||
| Output transition time | tt | 10 | 15 | ns | Y, CL = 50 pF, VCC = 4.5 V, TA = 25°C | 3 | |
| Output transition time | tt | 22 | ns | Y, CL = 50 pF, VCC = 4.5 V, TA = -40°C to 125°C | 3 | ||
| Output transition time | tt | 8 | 13 | ns | Y, CL = 50 pF, VCC = 6 V, TA = 25°C | 3 | |
| Output transition time | tt | 19 | ns | Y, CL = 50 pF, VCC = 6 V, TA = -40°C to 125°C | 3 | ||
| Package thermal impedance, PW package | θJA | 113 | °C/W | PW package, JESD 51-7 | 2 |
CAD (KiCad official)
- Symbol:
SN74HC21QPWRG4Q1 - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
sn74hc21qpwrg4q1-etched.step/sn74hc21qpwrg4q1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74hc21qpwrg4q1.step/sn74hc21qpwrg4q1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (15 pp, sha256
6f014d9be4b93dfe, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).