# SN74HC21QDRQ1

**Texas Instruments** · Logic Gates · SOIC-14

SN74HC21QDRQ1 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input A of AND gate 1; unused inputs must be held at VCC or GND, and input current is 1 µA max. |
| 2 | 1B | input | Data input B of AND gate 1; unused inputs must be held at VCC or GND, and input current is 1 µA max. |
| 3 | NC | unconnected | Not connected; the datasheet labels this pin NC and gives no further function. |
| 4 | 1C | input | Data input C of AND gate 1; unused inputs must be held at VCC or GND, and input current is 1 µA max. |
| 5 | 1D | input | Data input D of AND gate 1; unused inputs must be held at VCC or GND, and input current is 1 µA max. |
| 6 | 1Y | output | Output of gate 1 (Y = A·B·C·D); can drive up to ten LSTTL loads with ±4 mA drive at 5 V. |
| 7 | GND | power_in | Ground reference pin for the device. |
| 8 | 2Y | output | Output of gate 2 (Y = A·B·C·D); can drive up to ten LSTTL loads with ±4 mA drive at 5 V. |
| 9 | 2A | input | Data input A of AND gate 2; unused inputs must be held at VCC or GND, and input current is 1 µA max. |
| 10 | 2B | input | Data input B of AND gate 2; unused inputs must be held at VCC or GND, and input current is 1 µA max. |
| 11 | NC | unconnected | Not connected; the datasheet labels this pin NC and gives no further function. |
| 12 | 2C | input | Data input C of AND gate 2; unused inputs must be held at VCC or GND, and input current is 1 µA max. |
| 13 | 2D | input | Data input D of AND gate 2; unused inputs must be held at VCC or GND, and input current is 1 µA max. |
| 14 | VCC | power_in | Supply voltage, 2 V to 6 V recommended operating range (absolute maximum 7 V). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |

## CAD (KiCad official)

- Symbol: `SN74HC21QDRQ1`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files: `sn74hc21qdrq1-etched.step` / `sn74hc21qdrq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74hc21qdrq1.step` / `sn74hc21qdrq1.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn74hc21-q1) (15 pp, sha256 `f6de9b707f217039`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/sn74hc21qdrq1-datasheet.pdf)