SN74HC21PWR

@@ -0,0 +1,59 @@+# SN74HC21PWR++**Texas Instruments** · Gates · TSSOP-14++SN74HC21PWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | 1A | input | Channel 1, Input A. Standard high-impedance CMOS logic input for the first 4-input AND gate. VIH ≥ 3.15 V @ VCC=4.5 V; VIL ≤ 1.35 V @ VCC=4.5 V. |+| 2 | 1B | input | Channel 1, Input B. Standard high-impedance CMOS logic input for the first 4-input AND gate. |+| 3 | NC | unconnected | Not internally connected. Leave floating or tie to a defined level per board practice. |+| 4 | 1C | input | Channel 1, Input C. Standard high-impedance CMOS logic input for the first 4-input AND gate. |+| 5 | 1D | input | Channel 1, Input D. Standard high-impedance CMOS logic input for the first 4-input AND gate. |+| 6 | 1Y | output | Channel 1, Output Y. Balanced CMOS push-pull output; 1Y = 1A · 1B · 1C · 1D. IOH/IOL rated ±4 mA at VCC=4.5 V and ±5.2 mA at VCC=6 V. |+| 7 | GND | power_in | Ground reference (0 V). Common return for VCC supply and all logic inputs/outputs. |+| 8 | 2Y | output | Channel 2, Output Y. Balanced CMOS push-pull output; 2Y = 2A · 2B · 2C · 2D. |+| 9 | 2A | input | Channel 2, Input A. Standard high-impedance CMOS logic input for the second 4-input AND gate. |+| 10 | 2B | input | Channel 2, Input B. Standard high-impedance CMOS logic input for the second 4-input AND gate. |+| 11 | NC | unconnected | Not internally connected. Leave floating or tie to a defined level per board practice. |+| 12 | 2C | input | Channel 2, Input C. Standard high-impedance CMOS logic input for the second 4-input AND gate. |+| 13 | 2D | input | Channel 2, Input D. Standard high-impedance CMOS logic input for the second 4-input AND gate. |+| 14 | VCC | power_in | Positive supply. Recommended operating range 2 V to 6 V (nominal 5 V); absolute maximum 7 V. Bypass with a ceramic capacitor close to the pin. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TSSOP-14 |+| Category | Logic |+| Pins | 14 |++## Ordering variants++- `SN74HC21PWRPW`+- `SN74HC21PWRPWR`+- `SN74HC21PWRD`+- `SN74HC21PWRN`+- `SN74HC21PWRNS`+- `SN74HC21PWRJ`+- `SN74HC21PWRFK`++## CAD (KiCad official)++- Symbol: `SN74HC21PWR`+- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`+- 3D model: TSSOP-14 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/sn74hc21.pdf) (34 pp, sha256 `d9553773c8d57248`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn74hc21pwr-datasheet.pdf)

@@ -0,0 +1,34 @@+{+  "slug": "sn74hc21pwr",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Gates, TSSOP-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "logic",+    "sn74hc21pwr"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "sn74hc21pwr.kicad_sym",+    "sn74hc21pwr.kicad_mod",+    "sn74hc21pwr.glb",+    "sn74hc21pwr.step",+    "sn74hc21pwr.lbr",+    "docs/hero.png",+    "docs/sn74hc21pwr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file