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Initial commit: component/sn74hc175n

Ray ·bd5424b557 ·2d ago
2 files changed +261
README.mdadded+53
@@ -0,0 +1,53 @@+# SN74HC175N++**Texas Instruments** · Flip Flops · DIP-16++SN74HC175N from Texas Instruments, in a DIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | CLR | input | Active-low direct clear input that forces all Q outputs low and Q-bar outputs high regardless of CLK and D; clear pulse duration is 16 ns minimum at 4.5 V (25°C). |+| 2 | 1Q | output | Flip-flop 1 true output, driving ±4 mA at 4.5 V. |+| 3 | 1Q̄ | output | Flip-flop 1 complementary output, driving ±4 mA at 4.5 V. |+| 4 | 1D | input | Flip-flop 1 data input, transferred to the outputs on the rising edge of CLK with setup time met. |+| 5 | 2D | input | Flip-flop 2 data input, transferred to the outputs on the rising edge of CLK with setup time met. |+| 6 | 2Q̄ | output | Flip-flop 2 complementary output, driving ±4 mA at 4.5 V. |+| 7 | 2Q | output | Flip-flop 2 true output, driving ±4 mA at 4.5 V. |+| 8 | GND | power_in | Ground; continuous current through VCC or GND is limited to ±50 mA. |+| 9 | CLK | input | Common positive-edge clock input for all four flip-flops, with fmax of 25 MHz minimum at 4.5 V for SN74HC175. |+| 10 | 3Q | output | Flip-flop 3 true output, driving ±4 mA at 4.5 V. |+| 11 | 3Q̄ | output | Flip-flop 3 complementary output, driving ±4 mA at 4.5 V. |+| 12 | 3D | input | Flip-flop 3 data input, transferred to the outputs on the rising edge of CLK with setup time met. |+| 13 | 4D | input | Flip-flop 4 data input, transferred to the outputs on the rising edge of CLK with setup time met. |+| 14 | 4Q̄ | output | Flip-flop 4 complementary output, driving ±4 mA at 4.5 V. |+| 15 | 4Q | output | Flip-flop 4 true output, driving ±4 mA at 4.5 V. |+| 16 | VCC | power_in | Supply voltage, 2 V to 6 V recommended (absolute max 7 V); a 0.1-µF bypass capacitor close to the pin is recommended. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | DIP-16 |+| Category | Logic |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `SN74HC175N`+- Footprint: `Package_DIP:DIP-16_W7.62mm`+- 3D model: DIP-16 (KiCad packages3D, STEP)+- 3D model files: `sn74hc175n-etched.step` / `sn74hc175n-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74hc175n.step` / `sn74hc175n.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn74hc175) (31 pp, sha256 `a8340de8986d6ca7`, retrieved 2026-10-06, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn74hc175n-datasheet.pdf)
page.jsonadded+208
@@ -0,0 +1,208 @@+{+  "slug": "sn74hc175n",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Flip Flops, DIP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "logic",+    "sn74hc175n",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "sn74hc175n.kicad_sym",+    "sn74hc175n.kicad_mod",+    "sn74hc175n.glb",+    "sn74hc175n.step",+    "sn74hc175n.lbr",+    "docs/hero.png",+    "docs/sn74hc175n-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "sn74hc175n-hero.glb",+    "sn74hc175n-hero.overlay.json"+  ],+  "component": {+    "mpn": "SN74HC175N",+    "manufacturer": "Texas Instruments",+    "package": "DIP-16",+    "pin_count": 16,+    "category": "Logic",+    "subcategory": "Flip Flops",+    "datasheet": "https://www.ti.com/cn/lit/gpn/sn74hc175",+    "parts": {+      "symbol": "sn74hc175n.kicad_sym",+      "footprint": "sn74hc175n.kicad_mod",+      "model_3d": "sn74hc175n-hero.glb",+      "model_3d_plain": "sn74hc175n.glb",+      "model_3d_step": "sn74hc175n-etched.step",+      "model_3d_step_plain": "sn74hc175n.step",+      "lbr": "sn74hc175n.lbr"+    },+    "distributor_links": {+      "lcsc": 2896,+      "digikey": "2156-SN74HC175N-ND",+      "mouser": "595-SN74HC175N"+    },+    "distributor_check": {+      "checked_at": "2026-10-06T02:02:22Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "2156-SN74HC175N-ND",+        "status": "found",+        "lifecycle": "Active"+      },+      "mouser": {+        "pn": "595-SN74HC175N",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "CLR",+        "type": "input",+        "description": "Active-low direct clear input that forces all Q outputs low and Q-bar outputs high regardless of CLK and D; clear pulse duration is 16 ns minimum at 4.5 V (25°C)."+      },+      {+        "number": "2",+        "name": "1Q",+        "type": "output",+        "description": "Flip-flop 1 true output, driving ±4 mA at 4.5 V."+      },+      {+        "number": "3",+        "name": "1Q̄",+        "type": "output",+        "description": "Flip-flop 1 complementary output, driving ±4 mA at 4.5 V."+      },+      {+        "number": "4",+        "name": "1D",+        "type": "input",+        "description": "Flip-flop 1 data input, transferred to the outputs on the rising edge of CLK with setup time met."+      },+      {+        "number": "5",+        "name": "2D",+        "type": "input",+        "description": "Flip-flop 2 data input, transferred to the outputs on the rising edge of CLK with setup time met."+      },+      {+        "number": "6",+        "name": "2Q̄",+        "type": "output",+        "description": "Flip-flop 2 complementary output, driving ±4 mA at 4.5 V."+      },+      {+        "number": "7",+        "name": "2Q",+        "type": "output",+        "description": "Flip-flop 2 true output, driving ±4 mA at 4.5 V."+      },+      {+        "number": "8",+        "name": "GND",+        "type": "power_in",+        "description": "Ground; continuous current through VCC or GND is limited to ±50 mA."+      },+      {+        "number": "9",+        "name": "CLK",+        "type": "input",+        "description": "Common positive-edge clock input for all four flip-flops, with fmax of 25 MHz minimum at 4.5 V for SN74HC175."+      },+      {+        "number": "10",+        "name": "3Q",+        "type": "output",+        "description": "Flip-flop 3 true output, driving ±4 mA at 4.5 V."+      },+      {+        "number": "11",+        "name": "3Q̄",+        "type": "output",+        "description": "Flip-flop 3 complementary output, driving ±4 mA at 4.5 V."+      },+      {+        "number": "12",+        "name": "3D",+        "type": "input",+        "description": "Flip-flop 3 data input, transferred to the outputs on the rising edge of CLK with setup time met."+      },+      {+        "number": "13",+        "name": "4D",+        "type": "input",+        "description": "Flip-flop 4 data input, transferred to the outputs on the rising edge of CLK with setup time met."+      },+      {+        "number": "14",+        "name": "4Q̄",+        "type": "output",+        "description": "Flip-flop 4 complementary output, driving ±4 mA at 4.5 V."+      },+      {+        "number": "15",+        "name": "4Q",+        "type": "output",+        "description": "Flip-flop 4 true output, driving ±4 mA at 4.5 V."+      },+      {+        "number": "16",+        "name": "VCC",+        "type": "power_in",+        "description": "Supply voltage, 2 V to 6 V recommended (absolute max 7 V); a 0.1-µF bypass capacitor close to the pin is recommended."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-sonnet-5-5",+        "primary_mode": "text+vision",+        "consensus_model": "claude-opus-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "vision extraction: provenance cannot be text-verified; needs consensus"+        ],+        "pages_sent": 31,+        "cost_usd": 0.5179,+        "at": "2026-10-06T02:02:05"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/sn74hc175",+        "pages": 31,+        "sha256": "a8340de8986d6ca7",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 16,+        "described": 16,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file