component
SN74HC175DR
Public Made by Adomby adom
Texas Instruments Flip Flops, SOIC-16. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.
← Commit history
page.json+11−8@@ -53,13 +53,13 @@ "number": "1", "name": "CLR", "type": "input",- "description": "Active-low asynchronous direct clear input shared by all four flip-flops; when LOW, forces all Q outputs LOW and all Q\u0304 outputs HIGH regardless of CLK or D; setup time before CLK\u2191 \u2265 20 ns at VCC = 4.5 V."+ "description": "Active-low asynchronous direct clear input shared by all four flip-flops; when LOW, forces all Q outputs LOW and all Q̄ outputs HIGH regardless of CLK or D; setup time before CLK↑ ≥ 20 ns at VCC = 4.5 V." }, { "number": "2", "name": "1Q", "type": "output",- "description": "Non-inverting output of flip-flop 1; captures the state of 1D on the positive-going edge of CLK; IOH = \u22124 mA at VCC = 4.5 V, tpd = 30 ns max at VCC = 4.5 V."+ "description": "Non-inverting output of flip-flop 1; captures the state of 1D on the positive-going edge of CLK; IOH = −4 mA at VCC = 4.5 V, tpd = 30 ns max at VCC = 4.5 V." }, { "number": "3",@@ -89,13 +89,13 @@ "number": "7", "name": "2Q", "type": "output",- "description": "Non-inverting output of flip-flop 2; captures the state of 2D on the positive-going edge of CLK; IOH = \u22124 mA at VCC = 4.5 V, tpd = 30 ns max at VCC = 4.5 V."+ "description": "Non-inverting output of flip-flop 2; captures the state of 2D on the positive-going edge of CLK; IOH = −4 mA at VCC = 4.5 V, tpd = 30 ns max at VCC = 4.5 V." }, { "number": "8", "name": "GND", "type": "power_in",- "description": "Ground reference; continuous current through GND pin limited to \u00b150 mA."+ "description": "Ground reference; continuous current through GND pin limited to ±50 mA." }, { "number": "9",@@ -107,7 +107,7 @@ "number": "10", "name": "3Q", "type": "output",- "description": "Non-inverting output of flip-flop 3; captures the state of 3D on the positive-going edge of CLK; IOH = \u22124 mA at VCC = 4.5 V, tpd = 30 ns max at VCC = 4.5 V."+ "description": "Non-inverting output of flip-flop 3; captures the state of 3D on the positive-going edge of CLK; IOH = −4 mA at VCC = 4.5 V, tpd = 30 ns max at VCC = 4.5 V." }, { "number": "11",@@ -137,13 +137,13 @@ "number": "15", "name": "4Q", "type": "output",- "description": "Non-inverting output of flip-flop 4; captures the state of 4D on the positive-going edge of CLK; IOH = \u22124 mA at VCC = 4.5 V, tpd = 30 ns max at VCC = 4.5 V."+ "description": "Non-inverting output of flip-flop 4; captures the state of 4D on the positive-going edge of CLK; IOH = −4 mA at VCC = 4.5 V, tpd = 30 ns max at VCC = 4.5 V." }, { "number": "16", "name": "VCC", "type": "power_in",- "description": "Positive supply voltage; recommended operating range 2 V to 6 V; bypass with 0.1 \u00b5F capacitor placed as close to the pin as possible; ICC max = 80 \u00b5A at VCC = 6 V."+ "description": "Positive supply voltage; recommended operating range 2 V to 6 V; bypass with 0.1 µF capacitor placed as close to the pin as possible; ICC max = 80 µA at VCC = 6 V." } ], "provenance": {@@ -208,5 +208,8 @@ "docs/sn74hc175dr-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ]+ ],+ "visibility": {+ "public": true+ } }