SN74HC175DR - Commit

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sn74hc175dr: factory component page (tier=mfr)

Ray ·09f59ace3c ·5d ago ·parent ceb6452

3 files changed +17389−30

page.json+51−30 sn74hc175dr-etched.glbsn74hc175dr-etched.step+17338

page.json+51−30

@@ -1,8 +1,11 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "sn74hc175dr",+  "title": "SN74HC175DR",+  "brief": "Texas Instruments Flip Flops, SOIC-16. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "Texas Instruments Flip Flops, SOIC-16. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "logic",@@ -10,24 +13,6 @@     "factory-2.0.0",     "extractor-text"   ],-  "dependencies": {},-  "hero": {-    "type": "image",-    "path": "docs/hero.png"-  },-  "files": [-    "page.json",-    "README.md",-    "sn74hc175dr.kicad_sym",-    "sn74hc175dr.kicad_mod",-    "sn74hc175dr.glb",-    "sn74hc175dr.step",-    "sn74hc175dr.lbr",-    "docs/hero.png",-    "docs/sn74hc175dr-datasheet.pdf",-    "viewers/symbol.html",-    "viewers/footprint.html"-  ],   "component": {     "mpn": "SN74HC175DR",     "manufacturer": "Texas Instruments",@@ -68,13 +53,13 @@         "number": "1",         "name": "CLR",         "type": "input",-        "description": "Active-low asynchronous direct clear input shared by all four flip-flops; when LOW, forces all Q outputs LOW and all Q̄ outputs HIGH regardless of CLK or D; setup time before CLK↑ ≥ 20 ns at VCC = 4.5 V."+        "description": "Active-low asynchronous direct clear input shared by all four flip-flops; when LOW, forces all Q outputs LOW and all Q\u0304 outputs HIGH regardless of CLK or D; setup time before CLK\u2191 \u2265 20 ns at VCC = 4.5 V."       },       {         "number": "2",         "name": "1Q",         "type": "output",-        "description": "Non-inverting output of flip-flop 1; captures the state of 1D on the positive-going edge of CLK; IOH = −4 mA at VCC = 4.5 V, tpd = 30 ns max at VCC = 4.5 V."+        "description": "Non-inverting output of flip-flop 1; captures the state of 1D on the positive-going edge of CLK; IOH = \u22124 mA at VCC = 4.5 V, tpd = 30 ns max at VCC = 4.5 V."       },       {         "number": "3",@@ -104,13 +89,13 @@         "number": "7",         "name": "2Q",         "type": "output",-        "description": "Non-inverting output of flip-flop 2; captures the state of 2D on the positive-going edge of CLK; IOH = −4 mA at VCC = 4.5 V, tpd = 30 ns max at VCC = 4.5 V."+        "description": "Non-inverting output of flip-flop 2; captures the state of 2D on the positive-going edge of CLK; IOH = \u22124 mA at VCC = 4.5 V, tpd = 30 ns max at VCC = 4.5 V."       },       {         "number": "8",         "name": "GND",         "type": "power_in",-        "description": "Ground reference; continuous current through GND pin limited to ±50 mA."+        "description": "Ground reference; continuous current through GND pin limited to \u00b150 mA."       },       {         "number": "9",@@ -122,7 +107,7 @@         "number": "10",         "name": "3Q",         "type": "output",-        "description": "Non-inverting output of flip-flop 3; captures the state of 3D on the positive-going edge of CLK; IOH = −4 mA at VCC = 4.5 V, tpd = 30 ns max at VCC = 4.5 V."+        "description": "Non-inverting output of flip-flop 3; captures the state of 3D on the positive-going edge of CLK; IOH = \u22124 mA at VCC = 4.5 V, tpd = 30 ns max at VCC = 4.5 V."       },       {         "number": "11",@@ -152,13 +137,13 @@         "number": "15",         "name": "4Q",         "type": "output",-        "description": "Non-inverting output of flip-flop 4; captures the state of 4D on the positive-going edge of CLK; IOH = −4 mA at VCC = 4.5 V, tpd = 30 ns max at VCC = 4.5 V."+        "description": "Non-inverting output of flip-flop 4; captures the state of 4D on the positive-going edge of CLK; IOH = \u22124 mA at VCC = 4.5 V, tpd = 30 ns max at VCC = 4.5 V."       },       {         "number": "16",         "name": "VCC",         "type": "power_in",-        "description": "Positive supply voltage; recommended operating range 2 V to 6 V; bypass with 0.1 µF capacitor placed as close to the pin as possible; ICC max = 80 µA at VCC = 6 V."+        "description": "Positive supply voltage; recommended operating range 2 V to 6 V; bypass with 0.1 \u00b5F capacitor placed as close to the pin as possible; ICC max = 80 \u00b5A at VCC = 6 V."       }     ],     "provenance": {@@ -182,10 +167,46 @@       "footprint": "viewers/footprint.html"     }   },-  "visibility": "public",-  "org": "adom",+  "metadata": {+    "specs": {+      "Manufacturer": "Texas Instruments",+      "Package": "SOIC-16",+      "Category": "Logic",+      "Pins": "16"+    }+  },+  "variants": [],+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "sn74hc175dr"+  ],+  "discovery_pitch": "SN74HC175DR (Texas Instruments) component page: datasheet pinout, KiCad symbol, footprint and 3D.",   "author": {     "name": "Ray",     "email": "[email protected]"-  }+  },+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "sn74hc175dr.kicad_sym",+    "sn74hc175dr.kicad_mod",+    "sn74hc175dr.glb",+    "sn74hc175dr.step",+    "sn74hc175dr.lbr",+    "docs/hero.png",+    "docs/sn74hc175dr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ] }\ No newline at end of file

sn74hc175dr-etched.glbadded

⋯ 1 unchanged line ⋯

sn74hc175dr-etched.stepadded+17338

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