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SN74HC165DBR
Public Made by Adomby adom
Texas Instruments Shift Registers, SSOP-16-208mil. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74HC165DBR
Texas Instruments · Shift Registers · SSOP-16-208mil
SN74HC165DBR from Texas Instruments, in a SSOP-16-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SH/LD | input | Shift or Load control input, when high data is shifted through register stages toward QH output, when low parallel input data (A-H) is loaded independent of clock signals. |
| 2 | CLK | input | Clock input, rising edge shifts data toward serial output QH. |
| 3 | E | input | Parallel data input E, loaded into corresponding register stage when SH/LD is low. |
| 4 | F | input | Parallel data input F, loaded into corresponding register stage when SH/LD is low. |
| 5 | G | input | Parallel data input G, loaded into corresponding register stage when SH/LD is low. |
| 6 | H | input | Parallel data input H, loaded into corresponding register stage when SH/LD is low. |
| 7 | QH | output | Complementary serial output, inverted logic state of QH. |
| 8 | GND | power_in | Ground connection. |
| 9 | QH | output | Serial output, shifts data from input through register stages on rising edge of CLK. |
| 10 | SER | input | Serial data input, data is shifted in from this pin when SH/LD is high and CLK rises. |
| 11 | A | input | Parallel data input A, loaded into corresponding register stage when SH/LD is low. |
| 12 | B | input | Parallel data input B, loaded into corresponding register stage when SH/LD is low. |
| 13 | C | input | Parallel data input C, loaded into corresponding register stage when SH/LD is low. |
| 14 | D | input | Parallel data input D, loaded into corresponding register stage when SH/LD is low. |
| 15 | CLK INH | input | Clock inhibit input, when high inhibits clock function resulting in no change to output, when low CLK triggers normal shifting operation. |
| 16 | VCC | power_in | Power supply pin, 2 V to 6 V per recommended operating conditions. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SSOP-16-208mil |
| Category | Logic |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
SN74HC165DBR - Footprint:
Package_SO:SSOP-16_5.3x6.2mm_P0.65mm - 3D model: SSOP-16-208mil (KiCad packages3D, STEP)
- 3D model files:
sn74hc165dbr-etched.step/sn74hc165dbr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74hc165dbr.step/sn74hc165dbr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (37 pp, sha256
23fce2245965a562, retrieved 2026-09-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).