SN74HC164PWR

{
  "schema_version": 1,
  "type": "component",
  "slug": "sn74hc164pwr",
  "title": "SN74HC164PWR",
  "brief": "Texas Instruments Shifting Register, TSSOP-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.2.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "logic",
    "sn74hc164pwr"
  ],
  "component": {
    "mpn": "SN74HC164PWR",
    "manufacturer": "Texas Instruments",
    "package": "TSSOP-14",
    "pin_count": 14,
    "category": "Logic",
    "subcategory": "Shifting Register",
    "datasheet": "https://www.ti.com/lit/ds/symlink/sn74hc164.pdf",
    "parts": {
      "symbol": "sn74hc164pwr.kicad_sym",
      "footprint": "sn74hc164pwr.kicad_mod",
      "model_3d": "sn74hc164pwr-etched.glb",
      "model_3d_plain": "sn74hc164pwr.glb",
      "model_3d_step": "sn74hc164pwr-etched.step",
      "model_3d_step_plain": "sn74hc164pwr.step",
      "lbr": "sn74hc164pwr.lbr"
    },
    "distributor_links": {
      "digikey": "296-14020-2-ND",
      "mouser": "595-SN74HC164PWR",
      "lcsc": "C406867"
    },
    "pins": [
      {
        "number": "1",
        "name": "A",
        "type": "input",
        "description": "Gated Serial Input 1. AND-gated with input B to form the serial data into the first flip-flop; a low on A inhibits new data entry and resets the first flip-flop on the next CLK rising edge. VIH min 1.5 V at VCC=2 V, 3.15 V at VCC=4.5 V."
      },
      {
        "number": "2",
        "name": "B",
        "type": "input",
        "description": "Gated Serial Input 2. AND-gated with input A to form the serial data into the first flip-flop; a low on B inhibits new data entry. Input current ±1 µA max."
      },
      {
        "number": "3",
        "name": "QA",
        "type": "output",
        "description": "Parallel output bit A (first stage of the shift register). Drives ±4 mA at VCC=5 V into 10 LSTTL loads."
      },
      {
        "number": "4",
        "name": "QB",
        "type": "output",
        "description": "Parallel output bit B (second stage of the shift register). CMOS push-pull output; ±4 mA drive at 5 V."
      },
      {
        "number": "5",
        "name": "QC",
        "type": "output",
        "description": "Parallel output bit C (third stage of the shift register). CMOS push-pull output; ±4 mA drive at 5 V."
      },
      {
        "number": "6",
        "name": "QD",
        "type": "output",
        "description": "Parallel output bit D (fourth stage of the shift register). CMOS push-pull output; ±4 mA drive at 5 V."
      },
      {
        "number": "7",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference (0 V)."
      },
      {
        "number": "8",
        "name": "CLK",
        "type": "input",
        "description": "Clock input. Data is shifted one position on the low-to-high transition; fmax up to 36 MHz typical at VCC=6 V. Minimum high/low pulse width 14 ns at 6 V."
      },
      {
        "number": "9",
        "name": "CLR",
        "type": "input",
        "description": "Asynchronous active-low clear. Driving CLR low forces all Q outputs (QA..QH) to logic 0 independent of CLK. Minimum low pulse width 17 ns at VCC=6 V."
      },
      {
        "number": "10",
        "name": "QE",
        "type": "output",
        "description": "Parallel output bit E (fifth stage of the shift register). CMOS push-pull output; ±4 mA drive at 5 V."
      },
      {
        "number": "11",
        "name": "QF",
        "type": "output",
        "description": "Parallel output bit F (sixth stage of the shift register). CMOS push-pull output; ±4 mA drive at 5 V."
      },
      {
        "number": "12",
        "name": "QG",
        "type": "output",
        "description": "Parallel output bit G (seventh stage of the shift register). CMOS push-pull output; ±4 mA drive at 5 V."
      },
      {
        "number": "13",
        "name": "QH",
        "type": "output",
        "description": "Parallel output bit H (eighth/last stage of the shift register). CMOS push-pull output; ±4 mA drive at 5 V."
      },
      {
        "number": "14",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply voltage, 2 V to 6 V (recommended 5 V nominal). ICC max 8 µA at 25 °C."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/sn74hc164.pdf",
        "pages": 38,
        "sha256": "51860c45fddf000a",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 14,
        "described": 14,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "pin1": {
      "pad": "1",
      "at": [
        -2.8625,
        -1.95
      ],
      "corner": "top-left",
      "source": "silk-marker",
      "derived_from": "TSSOP-14_4.4x5mm_P0.65mm@sha256:e4bf82cea6d3b325",
      "mark": "drawn"
    },
    "logic": {
      "family_id": "74HC164",
      "logic_family": "74HC",
      "function_code": "164",
      "function_class": "ShiftRegister",
      "function_name": "8-Bit SIPO Shift Register",
      "manufacturer": "Texas Instruments",
      "is_specialty": false
    },
    "models_3d": [
      {
        "file": "sn74hc164pwr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5,
          1
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "3ee5786aae56190997aa793ba3cfc003fd616782770e29719b4562f012982245",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "sn74hc164pwr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5,
          1
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "023b1ec245bae999cb45b5c5054dfb2d932df48aa04b8c0909f586c8667083be",
        "checked": "2026-10-19",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "TSSOP-14",
      "Category": "Logic",
      "Pins": "14"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "sn74hc164pwr"
  ],
  "discovery_pitch": "SN74HC164PWR (Texas Instruments) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "sn74hc164pwr.kicad_sym",
    "sn74hc164pwr.kicad_mod",
    "sn74hc164pwr.glb",
    "sn74hc164pwr.step",
    "sn74hc164pwr-etched.step",
    "sn74hc164pwr.lbr",
    "docs/hero.png",
    "docs/sn74hc164pwr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "variants": [
    {
      "mpn": "SN74HC164PWR",
      "kind": "packaging"
    },
    {
      "mpn": "SN74HC164PWRD",
      "kind": "packaging"
    },
    {
      "mpn": "SN74HC164PWRN",
      "kind": "packaging"
    },
    {
      "mpn": "SN74HC164PWRNS",
      "kind": "packaging"
    },
    {
      "mpn": "SN74HC164PWRJ",
      "kind": "packaging"
    },
    {
      "mpn": "SN74HC164PWRW",
      "kind": "packaging"
    },
    {
      "mpn": "SN74HC164PWRFK",
      "kind": "packaging"
    }
  ],
  "updated_at": "2026-09-25T07:01:43.709Z"
}