SN74HC164PWR

{
 "schema": "adom.pads/1",
 "slug": "sn74hc164pwr",
 "footprint": "TSSOP-14_4.4x5mm_P0.65mm",
 "generated_from": {
  "footprint": "TSSOP-14_4.4x5mm_P0.65mm@sha256:e4bf82cea6d3b325",
  "pins": "page.json:component.pins",
  "overrides": null
 },
 "pin1": {
  "pad": "1",
  "at": [
   -2.8625,
   -1.95
  ],
  "corner": "top-left",
  "source": "silk-marker",
  "derived_from": "TSSOP-14_4.4x5mm_P0.65mm@sha256:e4bf82cea6d3b325"
 },
 "pad_count": 14,
 "symbol_pins": [
  "1",
  "10",
  "11",
  "12",
  "13",
  "14",
  "2",
  "3",
  "4",
  "5",
  "6",
  "7",
  "8",
  "9"
 ],
 "paste_apertures": 0,
 "issues": [],
 "pads": [
  {
   "pad": "1",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.8625,
    -1.95
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "1",
   "name": "A",
   "type": "input",
   "description": "Gated Serial Input 1. AND-gated with input B to form the serial data into the first flip-flop; a low on A inhibits new data entry and resets the first flip-flop on the next CLK rising edge. VIH min 1.5 V at VCC=2 V, 3.15 V at VCC=4.5 V.",
   "is_pin1": true,
   "source": {
    "geometry": "TSSOP-14_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "2",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.8625,
    -1.3
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "2",
   "name": "B",
   "type": "input",
   "description": "Gated Serial Input 2. AND-gated with input A to form the serial data into the first flip-flop; a low on B inhibits new data entry. Input current ±1 µA max.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-14_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "3",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.8625,
    -0.65
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "3",
   "name": "QA",
   "type": "output",
   "description": "Parallel output bit A (first stage of the shift register). Drives ±4 mA at VCC=5 V into 10 LSTTL loads.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-14_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "4",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.8625,
    0.0
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "4",
   "name": "QB",
   "type": "output",
   "description": "Parallel output bit B (second stage of the shift register). CMOS push-pull output; ±4 mA drive at 5 V.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-14_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "5",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.8625,
    0.65
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "5",
   "name": "QC",
   "type": "output",
   "description": "Parallel output bit C (third stage of the shift register). CMOS push-pull output; ±4 mA drive at 5 V.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-14_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "6",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.8625,
    1.3
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "6",
   "name": "QD",
   "type": "output",
   "description": "Parallel output bit D (fourth stage of the shift register). CMOS push-pull output; ±4 mA drive at 5 V.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-14_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "7",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.8625,
    1.95
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "7",
   "name": "GND",
   "type": "power_in",
   "description": "Ground reference (0 V).",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-14_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "8",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.8625,
    1.95
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "8",
   "name": "CLK",
   "type": "input",
   "description": "Clock input. Data is shifted one position on the low-to-high transition; fmax up to 36 MHz typical at VCC=6 V. Minimum high/low pulse width 14 ns at 6 V.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-14_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "9",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.8625,
    1.3
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "9",
   "name": "CLR",
   "type": "input",
   "description": "Asynchronous active-low clear. Driving CLR low forces all Q outputs (QA..QH) to logic 0 independent of CLK. Minimum low pulse width 17 ns at VCC=6 V.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-14_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "10",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.8625,
    0.65
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "10",
   "name": "QE",
   "type": "output",
   "description": "Parallel output bit E (fifth stage of the shift register). CMOS push-pull output; ±4 mA drive at 5 V.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-14_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "11",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.8625,
    0.0
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "11",
   "name": "QF",
   "type": "output",
   "description": "Parallel output bit F (sixth stage of the shift register). CMOS push-pull output; ±4 mA drive at 5 V.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-14_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "12",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.8625,
    -0.65
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "12",
   "name": "QG",
   "type": "output",
   "description": "Parallel output bit G (seventh stage of the shift register). CMOS push-pull output; ±4 mA drive at 5 V.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-14_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "13",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.8625,
    -1.3
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "13",
   "name": "QH",
   "type": "output",
   "description": "Parallel output bit H (eighth/last stage of the shift register). CMOS push-pull output; ±4 mA drive at 5 V.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-14_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "14",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.8625,
    -1.95
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "14",
   "name": "VCC",
   "type": "power_in",
   "description": "Positive supply voltage, 2 V to 6 V (recommended 5 V nominal). ICC max 8 µA at 25 °C.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-14_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  }
 ]
}