component

SN74HC163N

Public Made by Adom

by adom

Texas Instruments Counters, Dividers, DIP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogicsn74hc163nfactory-2.0.0extractor-text

Verified SN74HC163N

by Ray · last 6 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

6 Nov 2026RayPublished by the parts factory: tier mfr, 16 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: SN74HC163N · DIP-16 · 16 pins
  • ✓copper: 16 copper pads, none touching another net
  • ✓datasheet: all 16 pin names found in the 30-page datasheet
  • ✓distributor: lcsc C2893, digikey 2156-SN74HC163N-ND, mouser 595-SN74HC163N
  • ✓family: DIP-16_W7.62mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-r2he0eqc/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 16 pins = 16 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 16 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ sn74hc163n.kicad_sym✓ sn74hc163n.kicad_mod✓ sn74hc163n.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 2h ago
viewers sn74hc163n: viewers · Ray 2h ago
package.json Publish 0.1.0 · Ray 2h ago
page.json Set visibility: public · Ray 2h ago
README.md Publish 0.1.0 · Ray 2h ago
sn74hc163n-etched.glb Publish 0.1.0 · Ray 2h ago
sn74hc163n-etched.step sn74hc163n: factory component page (tier=mfr) · Ray 2h ago
sn74hc163n-hero.glb sn74hc163n: hero GLB from the etched model (keeps the MPN mark) · Ray 2h ago
sn74hc163n-hero.overlay.json Publish 0.1.0 · Ray 2h ago
sn74hc163n.glb Publish 0.1.0 · Ray 2h ago
sn74hc163n.kicad_mod Publish 0.1.0 · Ray 2h ago
sn74hc163n.kicad_sym Publish 0.1.0 · Ray 2h ago
sn74hc163n.lbr Publish 0.1.0 · Ray 2h ago
sn74hc163n.step Publish 0.1.0 · Ray 2h ago
verification.json Verified: Published by the parts factory: tier mfr, 16 pins · Ray 2h ago

SN74HC163N

Texas Instruments · Counters, Dividers · DIP-16

SN74HC163N from Texas Instruments, in a DIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CLR input Active-low synchronous clear: a low level sets all four flip-flop outputs low after the next low-to-high CLK transition, regardless of the enable inputs.
2 CLK input Buffered clock input; the four flip-flops trigger on the rising (positive-going) edge of the clock waveform.
3 A input Parallel data input A, loaded into QA on the clock edge when LOAD is low.
4 B input Parallel data input B, loaded into QB on the clock edge when LOAD is low.
5 C input Parallel data input C, loaded into QC on the clock edge when LOAD is low.
6 D input Parallel data input D, loaded into QD on the clock edge when LOAD is low.
7 ENP input Count-enable input; ENP and ENT must both be high for the counter to count.
8 GND power_in Ground reference pin.
9 LOAD input Synchronous preset enable; a low level disables counting and loads the A-D data into the outputs after the next clock pulse.
10 ENT input Count-enable input that is also fed forward to enable the RCO output; ENP and ENT must both be high to count.
11 QD output Counter output bit D (most significant bit) of the 4-bit binary count.
12 QC output Counter output bit C of the 4-bit binary count.
13 QB output Counter output bit B of the 4-bit binary count.
14 QA output Counter output bit A (least significant bit) of the 4-bit binary count.
15 RCO output Ripple-carry output that produces a high-level pulse while the count is maximum (9 or 15 with QA high) when ENT is high, for cascading stages.
16 VCC power_in Supply voltage pin; the recommended operating range is 2 V to 6 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package DIP-16
Category Logic
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 2 5 6 V 6
High-level input voltage VIH 1.5 V VCC = 2 V 6
High-level input voltage VIH 3.15 V VCC = 4.5 V 6
High-level input voltage VIH 4.2 V VCC = 6 V 6
Low-level input voltage VIL 0.5 V VCC = 2 V 6
Low-level input voltage VIL 1.35 V VCC = 4.5 V 6
Low-level input voltage VIL 1.8 V VCC = 6 V 6
Input voltage VI 0 V max VCC 6
Output voltage VO 0 V max VCC 6
Input transition rise/fall time Δt/Δv 1000 ns VCC = 2 V 6
Input transition rise/fall time Δt/Δv 500 ns VCC = 4.5 V 6
Input transition rise/fall time Δt/Δv 400 ns VCC = 6 V 6
Operating free-air temperature TA -40 85 °C SN74HC163 6
Supply voltage range VCC -0.5 7 V 6
Input clamp current IIK -20 20 mA VI < 0 or VI > VCC 6
Output clamp current IOK -20 20 mA VO < 0 or VO > VCC 6
Continuous output current IO -25 25 mA VO = 0 to VCC 6
Continuous current through VCC or GND -50 50 mA 6
Package thermal impedance, N package θJA 67 °C/W N package 6
Storage temperature range Tstg -65 150 °C 6
High-level output voltage VOH 1.9 1.998 V VI = VIH or VIL; IOH = -20 µA; VCC 2 V 7
High-level output voltage VOH 4.4 4.499 V VI = VIH or VIL; IOH = -20 µA; VCC 4.5 V 7
High-level output voltage VOH 5.9 5.999 V VI = VIH or VIL; IOH = -20 µA; VCC 6 V 7
High-level output voltage VOH 3.84 4.3 V VI = VIH or VIL; IOH = -4 mA; VCC 4.5 V 7
High-level output voltage VOH 5.34 5.8 V VI = VIH or VIL; IOH = -5.2 mA; VCC 6 V 7
Low-level output voltage VOL 0.002 0.1 V VI = VIH or VIL; IOL = 20 µA; VCC 2 V 7
Low-level output voltage VOL 0.001 0.1 V VI = VIH or VIL; IOL = 20 µA; VCC 4.5 V 7
Low-level output voltage VOL 0.17 0.33 V VI = VIH or VIL; IOL = 4 mA; VCC 4.5 V 7
Low-level output voltage VOL 0.15 0.33 V VI = VIH or VIL; IOL = 5.2 mA; VCC 6 V 7
Input current II -1000 0.1 1000 nA VI = VCC or 0; VCC 6 V 7
Supply current ICC 8 80 µA VI = VCC or 0, IO = 0; VCC 6 V 7
Input capacitance Ci 3 10 pF VCC 2 V to 6 V 7
Clock frequency fclock 5 MHz VCC 2 V 7
Clock frequency fclock 25 MHz VCC 4.5 V 7
Clock frequency fclock 29 MHz VCC 6 V 7
Pulse duration CLK high or low tw 100 ns VCC 2 V 7
Pulse duration CLK high or low tw 20 ns VCC 4.5 V 7
Pulse duration CLK high or low tw 17 ns VCC 6 V 7
Setup time before CLK↑ (A, B, C, or D) tsu 190 ns VCC 2 V 7
Setup time before CLK↑ (A, B, C, or D) tsu 38 ns VCC 4.5 V 7
Setup time before CLK↑ (A, B, C, or D) tsu 32 ns VCC 6 V 7
Setup time before CLK↑ (LOAD low) tsu 170 ns VCC 2 V 7
Setup time before CLK↑ (LOAD low) tsu 34 ns VCC 4.5 V 7
Setup time before CLK↑ (LOAD low) tsu 29 ns VCC 6 V 7
Setup time before CLK↑ (ENP, ENT) tsu 215 ns VCC 2 V 7
Setup time before CLK↑ (ENP, ENT) tsu 43 ns VCC 4.5 V 7
Setup time before CLK↑ (ENP, ENT) tsu 37 ns VCC 6 V 7
Setup time before CLK↑ (CLR low) tsu 200 ns VCC 2 V 7
Setup time before CLK↑ (CLR low) tsu 40 ns VCC 4.5 V 7
Setup time before CLK↑ (CLR low) tsu 34 ns VCC 6 V 7
Maximum clock frequency fmax fmax 5 MHz VCC 2 V; CL = 50 pF 8
Maximum clock frequency fmax fmax 25 MHz VCC 4.5 V; CL = 50 pF 8
Maximum clock frequency fmax fmax 29 MHz VCC 6 V; CL = 50 pF 8
Propagation delay CLK to Any Q tpd 255 ns VCC 2 V; CL = 50 pF 8
Propagation delay CLK to Any Q tpd 51 ns VCC 4.5 V; CL = 50 pF 8
Propagation delay CLK to Any Q tpd 43 ns VCC 6 V; CL = 50 pF 8
Propagation delay CLK to RCO 270 ns VCC 2 V; CL = 50 pF 8
Propagation delay CLK to RCO 54 ns VCC 4.5 V; CL = 50 pF 8
Propagation delay CLK to RCO 46 ns VCC 6 V; CL = 50 pF 8

CAD (KiCad official)

  • Symbol: SN74HC163N
  • Footprint: Package_DIP:DIP-16_W7.62mm
  • 3D model: DIP-16 (KiCad packages3D, STEP)
  • 3D model files: sn74hc163n-etched.step / sn74hc163n-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74hc163n.step / sn74hc163n.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (30 pp, sha256 7033099817317f28, retrieved 2026-11-06, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF