main
Ray sn74hc161dr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body… 3e5c679
{
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  "type": "component",
  "slug": "sn74hc161dr",
  "title": "SN74HC161DR",
  "brief": "Texas Instruments Counters / Dividers, SOIC-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
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    "mpn": "SN74HC161DR",
    "manufacturer": "Texas Instruments",
    "package": "SOIC-16",
    "pin_count": 16,
    "category": "Logic",
    "subcategory": "Counters / Dividers",
    "datasheet": "https://www.ti.com/lit/ds/symlink/sn74hc161.pdf",
    "parts": {
      "symbol": "sn74hc161dr.kicad_sym",
      "footprint": "sn74hc161dr.kicad_mod",
      "model_3d": "sn74hc161dr-etched.glb",
      "model_3d_plain": "sn74hc161dr.glb",
      "model_3d_step": "sn74hc161dr-etched.step",
      "model_3d_step_plain": "sn74hc161dr.step",
      "lbr": "sn74hc161dr.lbr"
    },
    "distributor_links": {
      "digikey": "296-14837-2-ND",
      "mouser": "595-SN74HC161DR",
      "lcsc": "C6824"
    },
    "pins": [
      {
        "number": "1",
        "name": "CLR",
        "type": "input",
        "description": "Active-low asynchronous clear. Driving CLR low forces all four Q outputs (QA-QD) low regardless of CLK, LOAD, or enable states."
      },
      {
        "number": "2",
        "name": "CLK",
        "type": "input",
        "description": "Buffered clock input. All four internal D/T flip-flops are triggered on the rising (positive-going) edge of CLK. Max clock frequency is ~25 MHz at Vcc=4.5 V."
      },
      {
        "number": "3",
        "name": "A",
        "type": "input",
        "description": "Parallel data input A (LSB of the 4-bit preset value). Loaded synchronously into the QA flip-flop on the rising edge of CLK when LOAD is low."
      },
      {
        "number": "4",
        "name": "B",
        "type": "input",
        "description": "Parallel data input B. Loaded synchronously into the QB flip-flop on the rising edge of CLK when LOAD is low."
      },
      {
        "number": "5",
        "name": "C",
        "type": "input",
        "description": "Parallel data input C. Loaded synchronously into the QC flip-flop on the rising edge of CLK when LOAD is low."
      },
      {
        "number": "6",
        "name": "D",
        "type": "input",
        "description": "Parallel data input D (MSB of the 4-bit preset value). Loaded synchronously into the QD flip-flop on the rising edge of CLK when LOAD is low."
      },
      {
        "number": "7",
        "name": "ENP",
        "type": "input",
        "description": "Count enable (P). Must be high, together with ENT, to enable counting on the next CLK rising edge. Transitions on ENP are allowed regardless of CLK state."
      },
      {
        "number": "8",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference (0 V) for the device."
      },
      {
        "number": "9",
        "name": "LOAD",
        "type": "input",
        "description": "Active-low synchronous parallel-load input. A low level disables counting and forces QA-QD to match the A-D inputs on the next rising edge of CLK."
      },
      {
        "number": "10",
        "name": "ENT",
        "type": "input",
        "description": "Count enable (T). Must be high, together with ENP, to enable counting; ENT is also fed forward to gate the RCO output. Transitions on ENT are allowed regardless of CLK state."
      },
      {
        "number": "11",
        "name": "QD",
        "type": "output",
        "description": "Counter output bit D (MSB). Push-pull CMOS output capable of driving ±4 mA at Vcc=5 V (up to 10 LSTTL loads)."
      },
      {
        "number": "12",
        "name": "QC",
        "type": "output",
        "description": "Counter output bit C. Push-pull CMOS output capable of driving ±4 mA at Vcc=5 V."
      },
      {
        "number": "13",
        "name": "QB",
        "type": "output",
        "description": "Counter output bit B. Push-pull CMOS output capable of driving ±4 mA at Vcc=5 V."
      },
      {
        "number": "14",
        "name": "QA",
        "type": "output",
        "description": "Counter output bit A (LSB). Push-pull CMOS output capable of driving ±4 mA at Vcc=5 V."
      },
      {
        "number": "15",
        "name": "RCO",
        "type": "output",
        "description": "Ripple-carry output. Produces a high-level pulse (gated by ENT) when the count reaches its maximum value (15, with QA high), used to cascade successive counter stages for n-bit synchronous counting."
      },
      {
        "number": "16",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply voltage, 2 V to 6 V recommended operating range (absolute max 7 V). Typical Icc is 80 µA max for the 74HC variant."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/sn74hc161.pdf",
        "pages": 31,
        "sha256": "58fced3e842dd1c0",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
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      "footprint": "viewers/footprint.html"
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    "pin1": {
      "pad": "1",
      "at": [
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        -4.445
      ],
      "corner": "top-left",
      "source": "silk-marker",
      "derived_from": "SOIC-16_3.9x9.9mm_P1.27mm@sha256:f9b5075740f7816c",
      "mark": "drawn"
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    "logic": {
      "family_id": "74HC161",
      "logic_family": "74HC",
      "function_code": "161",
      "function_class": "Counter",
      "function_name": "Synchronous 4-Bit Binary Counter",
      "manufacturer": "Texas Instruments",
      "is_specialty": false
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        "seat": "z = 0",
        "extents_mm": [
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        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",
        "checked": "2026-10-07",
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      {
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        "sha256": "ad031753ef537cfe2f883c7b69a49a861ccc461c49e4ef947f7ca72d4ae8b07a",
        "checked": "2026-10-19",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "SOIC-16",
      "Category": "Logic",
      "Pins": "16"
    }
  },
  "sections": [
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  "discovery_triggers": [
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  "discovery_pitch": "SN74HC161DR (Texas Instruments) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray"
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  "visibility": {
    "public": true
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  "variants": [
    {
      "mpn": "SN74HC161DRD",
      "kind": "packaging"
    },
    {
      "mpn": "SN74HC161DR",
      "kind": "packaging"
    },
    {
      "mpn": "SN74HC161DRDT",
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    },
    {
      "mpn": "SN74HC161DRN",
      "kind": "packaging"
    },
    {
      "mpn": "SN74HC161DRNSR",
      "kind": "packaging"
    },
    {
      "mpn": "SN74HC161DRPW",
      "kind": "packaging"
    },
    {
      "mpn": "SN74HC161DRPWR",
      "kind": "packaging"
    },
    {
      "mpn": "SN74HC161DRPWT",
      "kind": "packaging"
    },
    {
      "mpn": "SN74HC161DRJ",
      "kind": "packaging"
    },
    {
      "mpn": "SN74HC161DRW",
      "kind": "packaging"
    },
    {
      "mpn": "SN74HC161DRFK",
      "kind": "packaging"
    }
  ],
  "updated_at": "2026-09-25T07:01:10.864Z"
}