component
SN74HC153DR
Public Made by Adomby adom
Texas Instruments Signal Switches, Multiplexers, Decoders, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SN74HC153DR
Texas Instruments · Signal Switches, Multiplexers, Decoders · SOIC-16
SN74HC153DR from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1G | input | Active-low strobe (enable) input for section 1; a high level forces output 1Y low. |
| 2 | B | input | Select input B (MSB), common to both sections; unused inputs must be held at VCC or GND. |
| 3 | 1C3 | input | Data input 3 of section 1, selected when B and A are both high. |
| 4 | 1C2 | input | Data input 2 of section 1, selected when B is high and A is low. |
| 5 | 1C1 | input | Data input 1 of section 1, selected when B is low and A is high. |
| 6 | 1C0 | input | Data input 0 of section 1, selected when B and A are both low. |
| 7 | 1Y | output | Data output of section 1, driving ±6 mA at 5 V. |
| 8 | GND | power_in | Ground. |
| 9 | 2Y | output | Data output of section 2, driving ±6 mA at 5 V. |
| 10 | 2C0 | input | Data input 0 of section 2, selected when B and A are both low. |
| 11 | 2C1 | input | Data input 1 of section 2, selected when B is low and A is high. |
| 12 | 2C2 | input | Data input 2 of section 2, selected when B is high and A is low. |
| 13 | 2C3 | input | Data input 3 of section 2, selected when B and A are both high. |
| 14 | A | input | Select input A (LSB), common to both sections; unused inputs must be held at VCC or GND. |
| 15 | 2G | input | Active-low strobe (enable) input for section 2; a high level forces output 2Y low. |
| 16 | VCC | power_in | Supply voltage, 2 V to 6 V, with a 0.1-μF bypass capacitor recommended close to the pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16 |
| Category | Logic |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 2 | 5 | 6 | V | 4 | |
| High-level input voltage | VIH | 1.5 | V | VCC = 2 V | 4 | ||
| High-level input voltage | VIH | 3.15 | V | VCC = 4.5 V | 4 | ||
| High-level input voltage | VIH | 4.2 | V | VCC = 6 V | 4 | ||
| Low-level input voltage | VIL | 0.5 | V | VCC = 2 V | 4 | ||
| Low-level input voltage | VIL | 1.35 | V | VCC = 4.5 V | 4 | ||
| Low-level input voltage | VIL | 1.8 | V | VCC = 6 V | 4 | ||
| Input voltage | VI | 0 | V | 4 | |||
| Output voltage | VO | 0 | V | 4 | |||
| Input transition rise/fall time | Δt/Δv | 1000 | ns | VCC = 2 V | 4 | ||
| Input transition rise/fall time | Δt/Δv | 500 | ns | VCC = 4.5 V | 4 | ||
| Input transition rise/fall time | Δt/Δv | 400 | ns | VCC = 6 V | 4 | ||
| Operating free-air temperature | TA | -40 | 85 | °C | 4 | ||
| Supply voltage range | VCC | -0.5 | 7 | V | 4 | ||
| Input clamp current | IIK | -20 | 20 | mA | VI < 0 or VI > VCC | 4 | |
| Output clamp current | IOK | -20 | 20 | mA | VO < 0 or VO > VCC | 4 | |
| Continuous output current | IO | -35 | 35 | mA | VO = 0 to VCC | 4 | |
| Continuous current through VCC or GND | -70 | 70 | mA | 4 | |||
| Junction temperature | TJ | 150 | °C | 4 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| High-level output voltage | VOH | 1.9 | 1.998 | V | IOH = −20 μA; VCC = 2 V | 5 | |
| High-level output voltage | VOH | 4.4 | 4.499 | V | IOH = −20 μA; VCC = 4.5 V | 5 | |
| High-level output voltage | VOH | 5.9 | 5.999 | V | IOH = −20 μA; VCC = 6 V | 5 | |
| High-level output voltage | VOH | 3.84 | 4.3 | V | IOH = −6 mA; VCC = 4.5 V | 5 | |
| High-level output voltage | VOH | 5.34 | 5.8 | V | IOH = −7.8 mA; VCC = 6 V | 5 | |
| Low-level output voltage | VOL | 0.002 | 0.1 | V | IOL = 20 μA; VCC = 2 V | 5 | |
| Low-level output voltage | VOL | 0.001 | 0.1 | V | IOL = 20 μA; VCC = 4.5 V | 5 | |
| Low-level output voltage | VOL | 0.17 | 0.33 | V | IOL = 6 mA; VCC = 4.5 V | 5 | |
| Low-level output voltage | VOL | 0.15 | 0.33 | V | IOL = 7.8 mA; VCC = 6 V | 5 | |
| Input current | II | -1000 | 0.1 | 1000 | nA | VI = VCC or 0; VCC = 6 V | 5 |
| Supply current | ICC | 8 | 80 | μA | VI = VCC or 0, IO = 0; VCC = 6 V | 5 | |
| Input capacitance | Ci | 3 | 10 | pF | VCC = 2 V to 6 V | 5 | |
| Propagation delay (A or B to Y) | tpd | 90 | 190 | ns | CL = 50 pF; VCC = 2 V | 5 | |
| Propagation delay (A or B to Y) | tpd | 21 | 38 | ns | CL = 50 pF; VCC = 4.5 V | 5 | |
| Propagation delay (A or B to Y) | tpd | 17 | 32 | ns | CL = 50 pF; VCC = 6 V | 5 | |
| Propagation delay (Data to Y) | tpd | 73 | 158 | ns | CL = 50 pF; VCC = 2 V | 5 | |
| Propagation delay (Data to Y) | tpd | 17 | 35 | ns | CL = 50 pF; VCC = 4.5 V | 5 | |
| Propagation delay (Data to Y) | tpd | 14 | 29 | ns | CL = 50 pF; VCC = 6 V | 5 | |
| Propagation delay (G to Y) | tpd | 38 | 125 | ns | CL = 50 pF; VCC = 2 V | 5 | |
| Propagation delay (G to Y) | tpd | 11 | 24 | ns | CL = 50 pF; VCC = 4.5 V | 5 | |
| Propagation delay (G to Y) | tpd | 9 | 20 | ns | CL = 50 pF; VCC = 6 V | 5 | |
| Output transition time (Y) | tt | 20 | 75 | ns | CL = 50 pF; VCC = 2 V | 5 | |
| Output transition time (Y) | tt | 8 | 15 | ns | CL = 50 pF; VCC = 4.5 V | 5 | |
| Output transition time (Y) | tt | 6 | 13 | ns | CL = 50 pF; VCC = 6 V | 5 | |
| Propagation delay (A or B to Y) | tpd | 105 | 295 | ns | CL = 150 pF; VCC = 2 V | 6 | |
| Propagation delay (A or B to Y) | tpd | 27 | 59 | ns | CL = 150 pF; VCC = 4.5 V | 6 | |
| Propagation delay (A or B to Y) | tpd | 21 | 51 | ns | CL = 150 pF; VCC = 6 V | 6 | |
| Propagation delay (Data to Y) | tpd | 93 | 274 | ns | CL = 150 pF; VCC = 2 V | 6 | |
| Propagation delay (Data to Y) | tpd | 23 | 55 | ns | CL = 150 pF; VCC = 4.5 V | 6 | |
| Propagation delay (Data to Y) | tpd | 19 | 48 | ns | CL = 150 pF; VCC = 6 V | 6 | |
| Propagation delay (G to Y) | tpd | 60 | 230 | ns | CL = 150 pF; VCC = 2 V | 6 | |
| Propagation delay (G to Y) | tpd | 17 | 46 | ns | CL = 150 pF; VCC = 4.5 V | 6 | |
| Propagation delay (G to Y) | tpd | 14 | 40 | ns | CL = 150 pF; VCC = 6 V | 6 | |
| Output transition time (Y) | tt | 45 | 265 | ns | CL = 150 pF; VCC = 2 V | 6 | |
| Output transition time (Y) | tt | 17 | 53 | ns | CL = 150 pF; VCC = 4.5 V | 6 | |
| Output transition time (Y) | tt | 13 | 45 | ns | CL = 150 pF; VCC = 6 V | 6 | |
| Junction-to-ambient thermal resistance | RθJA | 73 | °C/W | D (SOIC) 16-pin package | 4 |
CAD (KiCad official)
- Symbol:
SN74HC153DR - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
sn74hc153dr-etched.step/sn74hc153dr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74hc153dr.step/sn74hc153dr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (29 pp, sha256
597f9aa76565c717, retrieved 2026-10-18, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SN74HC153DR
**Texas Instruments** · Signal Switches, Multiplexers, Decoders · SOIC-16
SN74HC153DR from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1G | input | Active-low strobe (enable) input for section 1; a high level forces output 1Y low. |
| 2 | B | input | Select input B (MSB), common to both sections; unused inputs must be held at VCC or GND. |
| 3 | 1C3 | input | Data input 3 of section 1, selected when B and A are both high. |
| 4 | 1C2 | input | Data input 2 of section 1, selected when B is high and A is low. |
| 5 | 1C1 | input | Data input 1 of section 1, selected when B is low and A is high. |
| 6 | 1C0 | input | Data input 0 of section 1, selected when B and A are both low. |
| 7 | 1Y | output | Data output of section 1, driving ±6 mA at 5 V. |
| 8 | GND | power_in | Ground. |
| 9 | 2Y | output | Data output of section 2, driving ±6 mA at 5 V. |
| 10 | 2C0 | input | Data input 0 of section 2, selected when B and A are both low. |
| 11 | 2C1 | input | Data input 1 of section 2, selected when B is low and A is high. |
| 12 | 2C2 | input | Data input 2 of section 2, selected when B is high and A is low. |
| 13 | 2C3 | input | Data input 3 of section 2, selected when B and A are both high. |
| 14 | A | input | Select input A (LSB), common to both sections; unused inputs must be held at VCC or GND. |
| 15 | 2G | input | Active-low strobe (enable) input for section 2; a high level forces output 2Y low. |
| 16 | VCC | power_in | Supply voltage, 2 V to 6 V, with a 0.1-μF bypass capacitor recommended close to the pin. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16 |
| Category | Logic |
| Pins | 16 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 2 | 5 | 6 | V | | 4 |
| High-level input voltage | VIH | 1.5 | | | V | VCC = 2 V | 4 |
| High-level input voltage | VIH | 3.15 | | | V | VCC = 4.5 V | 4 |
| High-level input voltage | VIH | 4.2 | | | V | VCC = 6 V | 4 |
| Low-level input voltage | VIL | | | 0.5 | V | VCC = 2 V | 4 |
| Low-level input voltage | VIL | | | 1.35 | V | VCC = 4.5 V | 4 |
| Low-level input voltage | VIL | | | 1.8 | V | VCC = 6 V | 4 |
| Input voltage | VI | 0 | | | V | | 4 |
| Output voltage | VO | 0 | | | V | | 4 |
| Input transition rise/fall time | Δt/Δv | | | 1000 | ns | VCC = 2 V | 4 |
| Input transition rise/fall time | Δt/Δv | | | 500 | ns | VCC = 4.5 V | 4 |
| Input transition rise/fall time | Δt/Δv | | | 400 | ns | VCC = 6 V | 4 |
| Operating free-air temperature | TA | -40 | | 85 | °C | | 4 |
| Supply voltage range | VCC | -0.5 | | 7 | V | | 4 |
| Input clamp current | IIK | -20 | | 20 | mA | VI < 0 or VI > VCC | 4 |
| Output clamp current | IOK | -20 | | 20 | mA | VO < 0 or VO > VCC | 4 |
| Continuous output current | IO | -35 | | 35 | mA | VO = 0 to VCC | 4 |
| Continuous current through VCC or GND | | -70 | | 70 | mA | | 4 |
| Junction temperature | TJ | | | 150 | °C | | 4 |
| Storage temperature | Tstg | -65 | | 150 | °C | | 4 |
| High-level output voltage | VOH | 1.9 | 1.998 | | V | IOH = −20 μA; VCC = 2 V | 5 |
| High-level output voltage | VOH | 4.4 | 4.499 | | V | IOH = −20 μA; VCC = 4.5 V | 5 |
| High-level output voltage | VOH | 5.9 | 5.999 | | V | IOH = −20 μA; VCC = 6 V | 5 |
| High-level output voltage | VOH | 3.84 | 4.3 | | V | IOH = −6 mA; VCC = 4.5 V | 5 |
| High-level output voltage | VOH | 5.34 | 5.8 | | V | IOH = −7.8 mA; VCC = 6 V | 5 |
| Low-level output voltage | VOL | | 0.002 | 0.1 | V | IOL = 20 μA; VCC = 2 V | 5 |
| Low-level output voltage | VOL | | 0.001 | 0.1 | V | IOL = 20 μA; VCC = 4.5 V | 5 |
| Low-level output voltage | VOL | | 0.17 | 0.33 | V | IOL = 6 mA; VCC = 4.5 V | 5 |
| Low-level output voltage | VOL | | 0.15 | 0.33 | V | IOL = 7.8 mA; VCC = 6 V | 5 |
| Input current | II | -1000 | 0.1 | 1000 | nA | VI = VCC or 0; VCC = 6 V | 5 |
| Supply current | ICC | | 8 | 80 | μA | VI = VCC or 0, IO = 0; VCC = 6 V | 5 |
| Input capacitance | Ci | | 3 | 10 | pF | VCC = 2 V to 6 V | 5 |
| Propagation delay (A or B to Y) | tpd | | 90 | 190 | ns | CL = 50 pF; VCC = 2 V | 5 |
| Propagation delay (A or B to Y) | tpd | | 21 | 38 | ns | CL = 50 pF; VCC = 4.5 V | 5 |
| Propagation delay (A or B to Y) | tpd | | 17 | 32 | ns | CL = 50 pF; VCC = 6 V | 5 |
| Propagation delay (Data to Y) | tpd | | 73 | 158 | ns | CL = 50 pF; VCC = 2 V | 5 |
| Propagation delay (Data to Y) | tpd | | 17 | 35 | ns | CL = 50 pF; VCC = 4.5 V | 5 |
| Propagation delay (Data to Y) | tpd | | 14 | 29 | ns | CL = 50 pF; VCC = 6 V | 5 |
| Propagation delay (G to Y) | tpd | | 38 | 125 | ns | CL = 50 pF; VCC = 2 V | 5 |
| Propagation delay (G to Y) | tpd | | 11 | 24 | ns | CL = 50 pF; VCC = 4.5 V | 5 |
| Propagation delay (G to Y) | tpd | | 9 | 20 | ns | CL = 50 pF; VCC = 6 V | 5 |
| Output transition time (Y) | tt | | 20 | 75 | ns | CL = 50 pF; VCC = 2 V | 5 |
| Output transition time (Y) | tt | | 8 | 15 | ns | CL = 50 pF; VCC = 4.5 V | 5 |
| Output transition time (Y) | tt | | 6 | 13 | ns | CL = 50 pF; VCC = 6 V | 5 |
| Propagation delay (A or B to Y) | tpd | | 105 | 295 | ns | CL = 150 pF; VCC = 2 V | 6 |
| Propagation delay (A or B to Y) | tpd | | 27 | 59 | ns | CL = 150 pF; VCC = 4.5 V | 6 |
| Propagation delay (A or B to Y) | tpd | | 21 | 51 | ns | CL = 150 pF; VCC = 6 V | 6 |
| Propagation delay (Data to Y) | tpd | | 93 | 274 | ns | CL = 150 pF; VCC = 2 V | 6 |
| Propagation delay (Data to Y) | tpd | | 23 | 55 | ns | CL = 150 pF; VCC = 4.5 V | 6 |
| Propagation delay (Data to Y) | tpd | | 19 | 48 | ns | CL = 150 pF; VCC = 6 V | 6 |
| Propagation delay (G to Y) | tpd | | 60 | 230 | ns | CL = 150 pF; VCC = 2 V | 6 |
| Propagation delay (G to Y) | tpd | | 17 | 46 | ns | CL = 150 pF; VCC = 4.5 V | 6 |
| Propagation delay (G to Y) | tpd | | 14 | 40 | ns | CL = 150 pF; VCC = 6 V | 6 |
| Output transition time (Y) | tt | | 45 | 265 | ns | CL = 150 pF; VCC = 2 V | 6 |
| Output transition time (Y) | tt | | 17 | 53 | ns | CL = 150 pF; VCC = 4.5 V | 6 |
| Output transition time (Y) | tt | | 13 | 45 | ns | CL = 150 pF; VCC = 6 V | 6 |
| Junction-to-ambient thermal resistance | RθJA | | 73 | | °C/W | D (SOIC) 16-pin package | 4 |
## CAD (KiCad official)
- Symbol: `SN74HC153DR`
- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`
- 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files: `sn74hc153dr-etched.step` / `sn74hc153dr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74hc153dr.step` / `sn74hc153dr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/sn74hc153.pdf) (29 pp, sha256 `597f9aa76565c717`, retrieved 2026-10-18, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sn74hc153dr-datasheet.pdf)