component

SN74HC14DTR

Public Made by Adom

by adom

XBLW Inverters, SOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogic icssn74hc14dtrfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 16h ago
viewers sn74hc14dtr: viewers · Ray 16h ago
package.json Publish 0.1.0 · Ray 16h ago
page.json Set visibility: public · Ray 16h ago
README.md Publish 0.1.0 · Ray 16h ago
sn74hc14dtr-etched.glb Publish 0.1.0 · Ray 16h ago
sn74hc14dtr-etched.step sn74hc14dtr: factory component page (tier=lcsc) · Ray 16h ago
sn74hc14dtr-hero.glb sn74hc14dtr: hero GLB from the etched model (keeps the MPN mark) · Ray 16h ago
sn74hc14dtr-hero.overlay.json Publish 0.1.0 · Ray 16h ago
sn74hc14dtr.glb Publish 0.1.0 · Ray 16h ago
sn74hc14dtr.kicad_mod Publish 0.1.0 · Ray 16h ago
sn74hc14dtr.kicad_sym Publish 0.1.0 · Ray 16h ago
sn74hc14dtr.lbr Publish 0.1.0 · Ray 16h ago
sn74hc14dtr.step Publish 0.1.0 · Ray 16h ago

SN74HC14DTR

XBLW · Inverters · SOP-14

SN74HC14DTR from XBLW, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Schmitt-trigger data input of gate 1, with input voltage range 0 V to VCC.
2 1Y output Inverted data output of gate 1, with output voltage range 0 V to VCC.
3 2A input Schmitt-trigger data input of gate 2, with input voltage range 0 V to VCC.
4 2Y output Inverted data output of gate 2, with output voltage range 0 V to VCC.
5 3A input Schmitt-trigger data input of gate 3, with input voltage range 0 V to VCC.
6 3Y output Inverted data output of gate 3, with output voltage range 0 V to VCC.
7 GND power_in Ground (0 V) reference for the device.
8 4Y output Inverted data output of gate 4, with output voltage range 0 V to VCC.
9 4A input Schmitt-trigger data input of gate 4, with input voltage range 0 V to VCC.
10 5Y output Inverted data output of gate 5, with output voltage range 0 V to VCC.
11 5A input Schmitt-trigger data input of gate 5, with input voltage range 0 V to VCC.
12 6Y output Inverted data output of gate 6, with output voltage range 0 V to VCC.
13 6A input Schmitt-trigger data input of gate 6, with input voltage range 0 V to VCC.
14 VCC power_in Supply voltage pin, recommended 2.0 V to 6.0 V and absolute maximum 7 V.

Key specifications

Parameter Value
Manufacturer XBLW
Package SOP-14
Category Logic ICs
Pins 14

CAD (KiCad official)

  • Symbol: SN74HC14DTR
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOP-14 (KiCad packages3D, STEP)
  • 3D model files: sn74hc14dtr-etched.step / sn74hc14dtr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74hc14dtr.step / sn74hc14dtr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XBLW datasheet (15 pp, sha256 16d3a6141ecc648b, retrieved 2026-10-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF