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SN74HC139 Dual 2-to-4 Decoder

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by adom

Dual 2-to-4 line decoder/demultiplexer with active-low outputs.

logicdecoderdemultiplexer74hctisoic-16
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Contents

README

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SN74HC139

Texas Instruments · Decoder / Demultiplexer · SOIC-16

The SN74HC139 contains two independent 2-to-4 line decoders/demultiplexers. Each takes two address inputs and an active-low enable, driving one of four active-low outputs low. It is a common way to generate chip selects or route a signal to one of four destinations.

Pinout

Pin Name Type Function
1 1G input Decoder 1 active-low enable (strobe). When high, all 1Y0-1Y3 outputs are forced high; when low, the selected output is driven low. Can be used as a data input in demultiplexing applications.
2 1A input Decoder 1 select input A (LSB of the 2-bit address for decoder 1).
3 1B input Decoder 1 select input B (MSB of the 2-bit address for decoder 1).
4 1Y0 output Decoder 1 active-low output 0. Driven low when 1G=L and (1B,1A)=(0,0); otherwise high. IOH = -4 mA / IOL = 4 mA at VCC = 4.5 V.
5 1Y1 output Decoder 1 active-low output 1. Driven low when 1G=L and (1B,1A)=(0,1); otherwise high.
6 1Y2 output Decoder 1 active-low output 2. Driven low when 1G=L and (1B,1A)=(1,0); otherwise high.
7 1Y3 output Decoder 1 active-low output 3. Driven low when 1G=L and (1B,1A)=(1,1); otherwise high.
8 GND power_in Ground reference (0 V) for both decoders.
9 2Y3 output Decoder 2 active-low output 3. Driven low when 2G=L and (2B,2A)=(1,1); otherwise high.
10 2Y2 output Decoder 2 active-low output 2. Driven low when 2G=L and (2B,2A)=(1,0); otherwise high.
11 2Y1 output Decoder 2 active-low output 1. Driven low when 2G=L and (2B,2A)=(0,1); otherwise high.
12 2Y0 output Decoder 2 active-low output 0. Driven low when 2G=L and (2B,2A)=(0,0); otherwise high.
13 2B input Decoder 2 select input B (MSB of the 2-bit address for decoder 2).
14 2A input Decoder 2 select input A (LSB of the 2-bit address for decoder 2).
15 2G input Decoder 2 active-low enable (strobe). When high, all 2Y0-2Y3 outputs are forced high; when low, the selected output is driven low. Can be used as a data input in demultiplexing applications.
16 VCC power_in Positive supply, 2 V to 6 V (5 V nominal). Bypass with a 0.1 uF capacitor close to the pin (0.1 uF and 1 uF in parallel is common).

Key specifications

Parameter Value
Type Dual 2-to-4 decoder / demultiplexer
Logic family 74HC (CMOS)
Outputs Active-low, one-of-four per decoder
Supply voltage 2 V to 6 V
Propagation delay 16 ns typ at 5 V
Operating temperature -40 C to 85 C

Ordering variants

Same part, different packaging or reel option.

  • SN74HC139D
  • SN74HC139DB
  • SN74HC139N
  • SN74HC139NS
  • SN74HC139PW
  • SN74HC139J
  • SN74HC139W
  • SN74HC139FK

CAD (KiCad official)

  • Symbol: sn74hc139.kicad_sym
  • Footprint: sn74hc139.kicad_mod
  • 3D model: SOIC-16 body from KiCad Package_SO/SOIC-16_3.9x9.9mm_P1.27mm.
  • 3D model files: sn74hc139-etched.step / sn74hc139-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74hc139.step / sn74hc139.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (30 pp, sha256 7bed90a2f9c2fe80, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF