SN74HC132

{
  "schema_version": 1,
  "type": "component",
  "slug": "sn74hc132",
  "title": "SN74HC132",
  "brief": "TI quad 2-input NAND with Schmitt-trigger inputs, SOIC-14. Hysteresis cleans noisy signals. HC 2-6 V. Datasheet-verified.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "logic",
    "nand",
    "schmitt-trigger",
    "74hc",
    "soic-14",
    "texas-instruments"
  ],
  "component": {
    "mpn": "SN74HC132",
    "manufacturer": "Texas Instruments",
    "package": "SOIC-14",
    "pin_count": 14,
    "category": "Logic IC",
    "subcategory": "Quad 2-input NAND Schmitt trigger",
    "datasheet": "https://www.ti.com/lit/ds/symlink/sn74hc132.pdf",
    "parts": {
      "symbol": "sn74hc132.kicad_sym",
      "footprint": "sn74hc132.kicad_mod",
      "model_3d": "sn74hc132-etched.glb",
      "model_3d_plain": "sn74hc132.glb",
      "lbr": "sn74hc132.lbr",
      "model_3d_step": "sn74hc132-etched.step",
      "model_3d_step_plain": "sn74hc132.step"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "1A",
        "type": "input",
        "description": "Gate 1 Schmitt-trigger input A. Typical hysteresis 0.9 V at VCC=4.5 V (VT+ ~1.55 V, VT- ~0.9 V). Input voltage range 0 to VCC."
      },
      {
        "number": "2",
        "name": "1B",
        "type": "input",
        "description": "Gate 1 Schmitt-trigger input B. Typical hysteresis 0.9 V at VCC=4.5 V. Input voltage range 0 to VCC."
      },
      {
        "number": "3",
        "name": "1Y",
        "type": "output",
        "description": "Gate 1 NAND output, Y = NOT(1A AND 1B). Push-pull CMOS output; VOH ≥ 3.98 V and VOL ≤ 0.26 V at VCC=4.5 V, IOH/IOL = ±4 mA."
      },
      {
        "number": "4",
        "name": "2A",
        "type": "input",
        "description": "Gate 2 Schmitt-trigger input A. Typical hysteresis 0.9 V at VCC=4.5 V. Input voltage range 0 to VCC."
      },
      {
        "number": "5",
        "name": "2B",
        "type": "input",
        "description": "Gate 2 Schmitt-trigger input B. Typical hysteresis 0.9 V at VCC=4.5 V. Input voltage range 0 to VCC."
      },
      {
        "number": "6",
        "name": "2Y",
        "type": "output",
        "description": "Gate 2 NAND output, Y = NOT(2A AND 2B). Push-pull CMOS output; VOH ≥ 3.98 V and VOL ≤ 0.26 V at VCC=4.5 V, IOH/IOL = ±4 mA."
      },
      {
        "number": "7",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference. All input and output voltages are measured with respect to this pin."
      },
      {
        "number": "8",
        "name": "3Y",
        "type": "output",
        "description": "Gate 3 NAND output, Y = NOT(3A AND 3B). Push-pull CMOS output; VOH ≥ 3.98 V and VOL ≤ 0.26 V at VCC=4.5 V, IOH/IOL = ±4 mA."
      },
      {
        "number": "9",
        "name": "3A",
        "type": "input",
        "description": "Gate 3 Schmitt-trigger input A. Typical hysteresis 0.9 V at VCC=4.5 V. Input voltage range 0 to VCC."
      },
      {
        "number": "10",
        "name": "3B",
        "type": "input",
        "description": "Gate 3 Schmitt-trigger input B. Typical hysteresis 0.9 V at VCC=4.5 V. Input voltage range 0 to VCC."
      },
      {
        "number": "11",
        "name": "4Y",
        "type": "output",
        "description": "Gate 4 NAND output, Y = NOT(4A AND 4B). Push-pull CMOS output; VOH ≥ 3.98 V and VOL ≤ 0.26 V at VCC=4.5 V, IOH/IOL = ±4 mA."
      },
      {
        "number": "12",
        "name": "4A",
        "type": "input",
        "description": "Gate 4 Schmitt-trigger input A. Typical hysteresis 0.9 V at VCC=4.5 V. Input voltage range 0 to VCC."
      },
      {
        "number": "13",
        "name": "4B",
        "type": "input",
        "description": "Gate 4 Schmitt-trigger input B. Typical hysteresis 0.9 V at VCC=4.5 V. Input voltage range 0 to VCC."
      },
      {
        "number": "14",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply. Recommended operating range 2 V to 6 V (5 V nominal). Absolute maximum 7 V. Bypass with a 100 nF ceramic capacitor to GND close to the pin."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/sn74hc132.pdf",
        "pages": 43,
        "sha256": "6db63c21be2f2971",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 14,
        "described": 14,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "logic": {
      "family_id": "74HC132",
      "logic_family": "74HC",
      "function_code": "132",
      "function_class": "Gate",
      "function_name": "Quad 2-Input NAND Schmitt Trigger",
      "manufacturer": "Texas Instruments",
      "is_specialty": false
    },
    "models_3d": [
      {
        "file": "sn74hc132.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          8.7,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "3b9a775da256c8afcc28dcddfbc2eb3f266107fe61ce8446d96f2c52b6f44a70",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "sn74hc132-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          8.7,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "a31b73347d763ad61925b24f4f31042c2095b669051186102cb4cc4528870df4",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Type": "Quad 2-input NAND, Schmitt inputs",
      "Gates": "4 independent",
      "Function": "Y = NOT (A AND B), hysteresis inputs",
      "Hysteresis": "~0.9 V at VCC=4.5 V",
      "Logic family": "HC (high-speed CMOS)",
      "Supply voltage": "2-6 V",
      "Common uses": "debounce, oscillators, edge cleanup",
      "Package": "SOIC-14"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "sn74hc132",
    "74hc132",
    "nand schmitt",
    "schmitt trigger nand",
    "debounce gate"
  ],
  "discovery_pitch": "SN74HC132 quad 2-input NAND Schmitt-trigger (SOIC-14) with datasheet-verified pinout, KiCad symbol/footprint/3D, and full provenance.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "sn74hc132.kicad_sym",
    "sn74hc132.kicad_mod",
    "sn74hc132.glb",
    "sn74hc132.lbr",
    "docs/hero.png",
    "docs/sn74hc132-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "sn74hc132-etched.step"
  ],
  "variants": [
    {
      "mpn": "SN74HC132D (SOIC-14, tube)",
      "kind": "packaging"
    },
    {
      "mpn": "SN74HC132DR (SOIC-14, tape & reel)",
      "kind": "packaging"
    }
  ]
}