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Initial commit: component/sn74hc08qpwrq1

Ray ·bd01d58f1e ·9d ago
2 files changed +243
README.mdadded+51
@@ -0,0 +1,51 @@+# SN74HC08QPWRQ1++**Texas Instruments** · Logic Gates · TSSOP-14++SN74HC08QPWRQ1 from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | 1A | input | Standard CMOS input for AND gate 1 input A, voltage range 0 to VCC V. |+| 2 | 1B | input | Standard CMOS input for AND gate 1 input B, voltage range 0 to VCC V. |+| 3 | 1Y | output | AND gate 1 output implementing Y = 1A · 1B, output swing 0 to VCC V, ±25 mA continuous current. |+| 4 | 2A | input | Standard CMOS input for AND gate 2 input A, voltage range 0 to VCC V. |+| 5 | 2B | input | Standard CMOS input for AND gate 2 input B, voltage range 0 to VCC V. |+| 6 | 2Y | output | AND gate 2 output implementing Y = 2A · 2B, output swing 0 to VCC V, ±25 mA continuous current. |+| 7 | GND | power_in | Ground reference, supports ±50 mA continuous current per Absolute Maximum Ratings. |+| 8 | 3Y | output | AND gate 3 output implementing Y = 3A · 3B, output swing 0 to VCC V, ±25 mA continuous current. |+| 9 | 3A | input | Standard CMOS input for AND gate 3 input A, voltage range 0 to VCC V. |+| 10 | 3B | input | Standard CMOS input for AND gate 3 input B, voltage range 0 to VCC V. |+| 11 | 4Y | output | AND gate 4 output implementing Y = 4A · 4B, output swing 0 to VCC V, ±25 mA continuous current. |+| 12 | 4A | input | Standard CMOS input for AND gate 4 input A, voltage range 0 to VCC V. |+| 13 | 4B | input | Standard CMOS input for AND gate 4 input B, voltage range 0 to VCC V. |+| 14 | VCC | power_out | Positive supply voltage (2 to 6 V recommended, −0.5 to 7 V absolute maximum), supports ±50 mA continuous current per Absolute Maximum Ratings. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TSSOP-14 |+| Category | Logic |+| Pins | 14 |++## CAD (KiCad official)++- Symbol: `SN74HC08QPWRQ1`+- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`+- 3D model: TSSOP-14 (KiCad packages3D, STEP)+- 3D model files: `sn74hc08qpwrq1-etched.step` / `sn74hc08qpwrq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74hc08qpwrq1.step` / `sn74hc08qpwrq1.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn74hc08-q1) (24 pp, sha256 `29d7fefe148df783`, retrieved 2026-09-26, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn74hc08qpwrq1-datasheet.pdf)
page.jsonadded+192
@@ -0,0 +1,192 @@+{+  "slug": "sn74hc08qpwrq1",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Logic Gates, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "logic",+    "sn74hc08qpwrq1",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "sn74hc08qpwrq1.kicad_sym",+    "sn74hc08qpwrq1.kicad_mod",+    "sn74hc08qpwrq1.glb",+    "sn74hc08qpwrq1.step",+    "sn74hc08qpwrq1.lbr",+    "docs/hero.png",+    "docs/sn74hc08qpwrq1-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "SN74HC08QPWRQ1",+    "manufacturer": "Texas Instruments",+    "package": "TSSOP-14",+    "pin_count": 14,+    "category": "Logic",+    "subcategory": "Logic Gates",+    "datasheet": "https://www.ti.com/cn/lit/gpn/sn74hc08-q1",+    "parts": {+      "symbol": "sn74hc08qpwrq1.kicad_sym",+      "footprint": "sn74hc08qpwrq1.kicad_mod",+      "model_3d": "sn74hc08qpwrq1-etched.glb",+      "model_3d_plain": "sn74hc08qpwrq1.glb",+      "model_3d_step": "sn74hc08qpwrq1-etched.step",+      "model_3d_step_plain": "sn74hc08qpwrq1.step",+      "lbr": "sn74hc08qpwrq1.lbr"+    },+    "distributor_links": {+      "lcsc": "C2861983",+      "digikey": "296-23612-2-ND",+      "mouser": "595-SN74HC08QPWRQ1"+    },+    "distributor_check": {+      "checked_at": "2026-09-26T20:23:26Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-23612-2-ND",+        "status": "found",+        "lifecycle": "Active"+      },+      "mouser": {+        "pn": "595-SN74HC08QPWRQ1",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "1A",+        "type": "input",+        "description": "Standard CMOS input for AND gate 1 input A, voltage range 0 to VCC V."+      },+      {+        "number": "2",+        "name": "1B",+        "type": "input",+        "description": "Standard CMOS input for AND gate 1 input B, voltage range 0 to VCC V."+      },+      {+        "number": "3",+        "name": "1Y",+        "type": "output",+        "description": "AND gate 1 output implementing Y = 1A · 1B, output swing 0 to VCC V, ±25 mA continuous current."+      },+      {+        "number": "4",+        "name": "2A",+        "type": "input",+        "description": "Standard CMOS input for AND gate 2 input A, voltage range 0 to VCC V."+      },+      {+        "number": "5",+        "name": "2B",+        "type": "input",+        "description": "Standard CMOS input for AND gate 2 input B, voltage range 0 to VCC V."+      },+      {+        "number": "6",+        "name": "2Y",+        "type": "output",+        "description": "AND gate 2 output implementing Y = 2A · 2B, output swing 0 to VCC V, ±25 mA continuous current."+      },+      {+        "number": "7",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference, supports ±50 mA continuous current per Absolute Maximum Ratings."+      },+      {+        "number": "8",+        "name": "3Y",+        "type": "output",+        "description": "AND gate 3 output implementing Y = 3A · 3B, output swing 0 to VCC V, ±25 mA continuous current."+      },+      {+        "number": "9",+        "name": "3A",+        "type": "input",+        "description": "Standard CMOS input for AND gate 3 input A, voltage range 0 to VCC V."+      },+      {+        "number": "10",+        "name": "3B",+        "type": "input",+        "description": "Standard CMOS input for AND gate 3 input B, voltage range 0 to VCC V."+      },+      {+        "number": "11",+        "name": "4Y",+        "type": "output",+        "description": "AND gate 4 output implementing Y = 4A · 4B, output swing 0 to VCC V, ±25 mA continuous current."+      },+      {+        "number": "12",+        "name": "4A",+        "type": "input",+        "description": "Standard CMOS input for AND gate 4 input A, voltage range 0 to VCC V."+      },+      {+        "number": "13",+        "name": "4B",+        "type": "input",+        "description": "Standard CMOS input for AND gate 4 input B, voltage range 0 to VCC V."+      },+      {+        "number": "14",+        "name": "VCC",+        "type": "power_out",+        "description": "Positive supply voltage (2 to 6 V recommended, −0.5 to 7 V absolute maximum), supports ±50 mA continuous current per Absolute Maximum Ratings."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.2",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.2",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-4-6",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [],+        "pages_sent": 24,+        "cost_usd": 0.1972,+        "at": "2026-09-26T20:23:09"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/sn74hc08-q1",+        "pages": 24,+        "sha256": "29d7fefe148df783",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 14,+        "described": 14,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file