Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

SN74HC08QPWRQ1

Texas Instruments · Logic Gates · TSSOP-14

SN74HC08QPWRQ1 from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Standard CMOS input for AND gate 1 input A, voltage range 0 to VCC V.
2 1B input Standard CMOS input for AND gate 1 input B, voltage range 0 to VCC V.
3 1Y output AND gate 1 output implementing Y = 1A · 1B, output swing 0 to VCC V, ±25 mA continuous current.
4 2A input Standard CMOS input for AND gate 2 input A, voltage range 0 to VCC V.
5 2B input Standard CMOS input for AND gate 2 input B, voltage range 0 to VCC V.
6 2Y output AND gate 2 output implementing Y = 2A · 2B, output swing 0 to VCC V, ±25 mA continuous current.
7 GND power_in Ground reference, supports ±50 mA continuous current per Absolute Maximum Ratings.
8 3Y output AND gate 3 output implementing Y = 3A · 3B, output swing 0 to VCC V, ±25 mA continuous current.
9 3A input Standard CMOS input for AND gate 3 input A, voltage range 0 to VCC V.
10 3B input Standard CMOS input for AND gate 3 input B, voltage range 0 to VCC V.
11 4Y output AND gate 4 output implementing Y = 4A · 4B, output swing 0 to VCC V, ±25 mA continuous current.
12 4A input Standard CMOS input for AND gate 4 input A, voltage range 0 to VCC V.
13 4B input Standard CMOS input for AND gate 4 input B, voltage range 0 to VCC V.
14 VCC power_out Positive supply voltage (2 to 6 V recommended, −0.5 to 7 V absolute maximum), supports ±50 mA continuous current per Absolute Maximum Ratings.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-14
Category Logic
Pins 14

CAD (KiCad official)

  • Symbol: SN74HC08QPWRQ1
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: sn74hc08qpwrq1-etched.step / sn74hc08qpwrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74hc08qpwrq1.step / sn74hc08qpwrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (24 pp, sha256 29d7fefe148df783, retrieved 2026-09-26, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF