component
SN74HC08 Quad AND Gate
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Quad 2-input AND gate in the 74HC CMOS family.
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page.json+155−8@@ -1,8 +1,11 @@ {+ "schema_version": 1,+ "type": "component", "slug": "sn74hc08",+ "title": "SN74HC08 Quad AND Gate",+ "brief": "Quad 2-input AND gate in the 74HC CMOS family.", "version": "0.1.0",- "type": "component",- "description": "Quad 2-input AND gate in the 74HC CMOS family.",+ "license": "CC-BY-SA-4.0", "tags": [ "logic", "and-gate",@@ -11,6 +14,155 @@ "ti", "soic-14" ],+ "component": {+ "mpn": "SN74HC08",+ "manufacturer": "Texas Instruments",+ "package": "SOIC-14",+ "pin_count": 14,+ "category": "Logic",+ "subcategory": "Logic Gate",+ "datasheet": "https://www.ti.com/lit/ds/symlink/sn74hc08.pdf",+ "parts": {+ "symbol": "sn74hc08.kicad_sym",+ "footprint": "sn74hc08.kicad_mod",+ "model_3d": "sn74hc08.glb"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "1A",+ "type": "input",+ "description": "Channel 1, Input A. Logic input to gate 1 (buffered CMOS input). V_IH \u2265 3.15 V at V_CC = 4.5 V; input leakage \u00b10.1 \u00b5A typ."+ },+ {+ "number": "2",+ "name": "1B",+ "type": "input",+ "description": "Channel 1, Input B. Logic input to gate 1 (buffered CMOS input)."+ },+ {+ "number": "3",+ "name": "1Y",+ "type": "output",+ "description": "Channel 1, Output Y. AND output: Y = 1A \u00b7 1B. Drives up to \u00b14 mA at V_CC = 4.5 V with V_OH \u2265 3.98 V / V_OL \u2264 0.26 V."+ },+ {+ "number": "4",+ "name": "2A",+ "type": "input",+ "description": "Channel 2, Input A. Logic input to gate 2."+ },+ {+ "number": "5",+ "name": "2B",+ "type": "input",+ "description": "Channel 2, Input B. Logic input to gate 2."+ },+ {+ "number": "6",+ "name": "2Y",+ "type": "output",+ "description": "Channel 2, Output Y. AND output: Y = 2A \u00b7 2B."+ },+ {+ "number": "7",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference (0 V). Common return for V_CC."+ },+ {+ "number": "8",+ "name": "3Y",+ "type": "output",+ "description": "Channel 3, Output Y. AND output: Y = 3A \u00b7 3B."+ },+ {+ "number": "9",+ "name": "3A",+ "type": "input",+ "description": "Channel 3, Input A. Logic input to gate 3."+ },+ {+ "number": "10",+ "name": "3B",+ "type": "input",+ "description": "Channel 3, Input B. Logic input to gate 3."+ },+ {+ "number": "11",+ "name": "4Y",+ "type": "output",+ "description": "Channel 4, Output Y. AND output: Y = 4A \u00b7 4B."+ },+ {+ "number": "12",+ "name": "4A",+ "type": "input",+ "description": "Channel 4, Input A. Logic input to gate 4."+ },+ {+ "number": "13",+ "name": "4B",+ "type": "input",+ "description": "Channel 4, Input B. Logic input to gate 4."+ },+ {+ "number": "14",+ "name": "VCC",+ "type": "power_in",+ "description": "Positive supply. Operating range 2 V to 6 V (recommended); absolute max 7 V."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://www.ti.com/lit/ds/symlink/sn74hc08.pdf",+ "pages": 38,+ "sha256": "7c6d615e4510b91b",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 14,+ "described": 14,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Type": "Quad 2-input AND gate",+ "Logic family": "74HC (CMOS)",+ "Supply voltage": "2 V to 6 V",+ "Output current": "+-5.2 mA at VCC = 4.5 V",+ "Propagation delay": "8 ns typ at 5 V",+ "Operating temperature": "-40 C to 85 C"+ }+ },+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "AND gate",+ "logic gate",+ "combinational logic",+ "signal gating"+ ],+ "discovery_pitch": "Four independent 2-input AND gates for glue logic and signal gating.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -26,10 +178,5 @@ "docs/sn74hc08-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }