component
SN74HC06DR
Public Made by Adomby adom
lingxingic Inverters, SOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74HC06DR
lingxingic · Inverters · SOP-14
SN74HC06DR from lingxingic, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input of inverter 1; input levels are CMOS for SN74HC06 and TTL for SN74HCT06, and the input voltage range is 0 to VCC. |
| 2 | 1Y | output | Open-drain data output of inverter 1 that requires an external pull-up resistor; absolute maximum output voltage is +7.0 V. |
| 3 | 2A | input | Data input of inverter 2; input levels are CMOS for SN74HC06 and TTL for SN74HCT06, and the input voltage range is 0 to VCC. |
| 4 | 2Y | output | Open-drain data output of inverter 2 that requires an external pull-up resistor; absolute maximum output voltage is +7.0 V. |
| 5 | 3A | input | Data input of inverter 3; input levels are CMOS for SN74HC06 and TTL for SN74HCT06, and the input voltage range is 0 to VCC. |
| 6 | 3Y | output | Open-drain data output of inverter 3 that requires an external pull-up resistor; absolute maximum output voltage is +7.0 V. |
| 7 | GND | power_in | Ground reference (0 V) for all voltages in the datasheet. |
| 8 | 4Y | output | Open-drain data output of inverter 4 that requires an external pull-up resistor; absolute maximum output voltage is +7.0 V. |
| 9 | 4A | input | Data input of inverter 4; input levels are CMOS for SN74HC06 and TTL for SN74HCT06, and the input voltage range is 0 to VCC. |
| 10 | 5Y | output | Open-drain data output of inverter 5 that requires an external pull-up resistor; absolute maximum output voltage is +7.0 V. |
| 11 | 5A | input | Data input of inverter 5; input levels are CMOS for SN74HC06 and TTL for SN74HCT06, and the input voltage range is 0 to VCC. |
| 12 | 6Y | output | Open-drain data output of inverter 6 that requires an external pull-up resistor; absolute maximum output voltage is +7.0 V. |
| 13 | 6A | input | Data input of inverter 6; input levels are CMOS for SN74HC06 and TTL for SN74HCT06, and the input voltage range is 0 to VCC. |
| 14 | VCC | power_in | Supply voltage: 2.0 V to 6.0 V for SN74HC06 and 4.5 V to 5.5 V for SN74HCT06, with absolute maximum rating of +7.0 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | lingxingic |
| Package | SOP-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| supply voltage | VCC | -0.5 | 7 | V | 6 | ||
| output voltage | VO | -0.5 | 7 | V | 6 | ||
| input clamping current | IIK | -20 | 20 | mA | VI<-0.5V or VI>VCC+0.5V | 6 | |
| output clamping current | IOK | -20 | mA | VO<-0.5V | 6 | ||
| output current | IO | -25 | mA | -0.5V<VO | 6 | ||
| supply current | ICC | 50 | mA | 6 | |||
| ground current | IGND | -50 | mA | 6 | |||
| storage temperature | Tstg | -65 | 150 | ℃ | 6 | ||
| total power dissipation | Ptot | 500 | mW | 6 | |||
| soldering temperature (SOP) | TL | 250 | ℃ | 10s | 6 | ||
| supply voltage | VCC | 2 | 5 | 6 | V | 7 | |
| input voltage | VI | 0 | V | 7 | |||
| output voltage | VO | 0 | V | 7 | |||
| input transition rise and fall rate | Δt/ΔV | 625 | ns/V | VCC=2.0V | 7 | ||
| input transition rise and fall rate | Δt/ΔV | 1.67 | 139 | ns/V | VCC=4.5V | 7 | |
| input transition rise and fall rate | Δt/ΔV | 83 | ns/V | VCC=6.0V | 7 | ||
| ambient temperature | Tamb | -40 | 125 | ℃ | 7 | ||
| HIGH-level input voltage | VIH | 1.5 | V | Tamb=25℃; VCC=2.0V | 7 | ||
| HIGH-level input voltage | VIH | 3.15 | V | Tamb=25℃; VCC=4.5V | 7 | ||
| HIGH-level input voltage | VIH | 4.2 | V | Tamb=25℃; VCC=6.0V | 7 | ||
| LOW-level input voltage | VIL | 0.5 | V | Tamb=25℃; VCC=2.0V | 7 | ||
| LOW-level input voltage | VIL | 1.35 | V | Tamb=25℃; VCC=4.5V | 7 | ||
| LOW-level input voltage | VIL | 1.8 | V | Tamb=25℃; VCC=6.0V | 7 | ||
| LOW-level output voltage | VOL | 0.1 | V | Tamb=25℃; VI=VIH or VIL; IO=20uA; VCC=2.0V | 7 | ||
| LOW-level output voltage | VOL | 0.26 | V | Tamb=25℃; VI=VIH or VIL; IO=4.0mA; VCC=4.5V | 7 | ||
| input leakage current | II | -1 | 1 | uA | Tamb=25℃; VI=VCC or GND; VCC=6.0V | 7 | |
| OFF-state output current | IOZ | -1 | 1 | uA | Tamb=25℃; per input pin; VI=VIL; VO=VCC or GND; other inputs at VCC or GND; VCC=6.0V; IO=0A | 7 | |
| supply current | ICC | 2 | uA | Tamb=25℃; VI=VCC or GND; IO=0A; VCC=6.0V | 7 | ||
| HIGH-level input voltage | VIH | 1.5 | V | Tamb=-40℃ to +125℃; VCC=2.0V | 9 | ||
| HIGH-level input voltage | VIH | 3.15 | V | Tamb=-40℃ to +125℃; VCC=4.5V | 9 | ||
| HIGH-level input voltage | VIH | 4.2 | V | Tamb=-40℃ to +125℃; VCC=6.0V | 9 | ||
| LOW-level input voltage | VIL | 0.5 | V | Tamb=-40℃ to +125℃; VCC=2.0V | 9 | ||
| LOW-level input voltage | VIL | 1.35 | V | Tamb=-40℃ to +125℃; VCC=4.5V | 9 | ||
| LOW-level input voltage | VIL | 1.8 | V | Tamb=-40℃ to +125℃; VCC=6.0V | 9 | ||
| LOW-level output voltage | VOL | 0.1 | V | Tamb=-40℃ to +125℃; VI=VIH or VIL; IO=20uA; VCC=2.0V | 9 | ||
| LOW-level output voltage | VOL | 0.4 | V | Tamb=-40℃ to +125℃; VI=VIH or VIL; IO=4.0mA; VCC=4.5V | 9 | ||
| input leakage current | II | -20 | 20 | uA | Tamb=-40℃ to +125℃; VI=VCC or GND; VCC=6.0V | 9 | |
| OFF-state output current | IOZ | -20 | 20 | uA | Tamb=-40℃ to +125℃; per input pin; VI=VIL; VO=VCC or GND; other inputs at VCC or GND; VCC=6.0V; IO=0A | 9 | |
| supply current | ICC | 40 | uA | Tamb=-40℃ to +125℃; VI=VCC or GND; IO=0A; VCC=6.0V | 9 | ||
| propagation delay | tpd | 95 | ns | Tamb=25℃; CL=50pF; VCC=2.0V; nA to nY | 10 | ||
| propagation delay | tpd | 19 | ns | Tamb=25℃; CL=50pF; VCC=4.5V; nA to nY | 10 | ||
| propagation delay | tpd | 16 | ns | Tamb=25℃; CL=50pF; VCC=6.0V; nA to nY | 10 | ||
| transition time | tt | 75 | ns | Tamb=25℃; CL=50pF; VCC=2.0V; nA to nY | 10 | ||
| transition time | tt | 15 | ns | Tamb=25℃; CL=50pF; VCC=4.5V; nA to nY | 10 | ||
| transition time | tt | 13 | ns | Tamb=25℃; CL=50pF; VCC=6.0V; nA to nY | 10 | ||
| propagation delay | tpd | 145 | ns | Tamb=-40℃ to +125℃; CL=50pF; VCC=2.0V; nA to nY | 11 | ||
| propagation delay | tpd | 29 | ns | Tamb=-40℃ to +125℃; CL=50pF; VCC=4.5V; nA to nY | 11 | ||
| propagation delay | tpd | 25 | ns | Tamb=-40℃ to +125℃; CL=50pF; VCC=6.0V; nA to nY | 11 | ||
| transition time | tt | 110 | ns | Tamb=-40℃ to +125℃; CL=50pF; VCC=2.0V; nA to nY | 11 | ||
| transition time | tt | 22 | ns | Tamb=-40℃ to +125℃; CL=50pF; VCC=4.5V; nA to nY | 11 | ||
| transition time | tt | 19 | ns | Tamb=-40℃ to +125℃; CL=50pF; VCC=6.0V; nA to nY | 11 |
CAD (KiCad official)
- Symbol:
SN74HC06DR - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOP-14 (KiCad packages3D, STEP)
- 3D model files:
sn74hc06dr-etched.step/sn74hc06dr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74hc06dr.step/sn74hc06dr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: lingxingic datasheet (16 pp, sha256
bd048da27dcc93bd, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).