component
SN74HC04NE4
Public Made by Adomby adom
Texas Instruments Inverters, PDIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SN74HC04NE4
Texas Instruments · Inverters · PDIP-14
SN74HC04NE4 from Texas Instruments, in a PDIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Input A of inverter channel 1; each gate performs Y = A in positive logic. |
| 2 | 1Y | output | Output Y of inverter channel 1, the logical inverse of input 1A. |
| 3 | 2A | input | Input A of inverter channel 2; each gate performs Y = A in positive logic. |
| 4 | 2Y | output | Output Y of inverter channel 2, the logical inverse of input 2A. |
| 5 | 3A | input | Input A of inverter channel 3; each gate performs Y = A in positive logic. |
| 6 | 3Y | output | Output Y of inverter channel 3, the logical inverse of input 3A. |
| 7 | GND | power_in | Ground reference for the device. |
| 8 | 4Y | output | Output Y of inverter channel 4, the logical inverse of input 4A. |
| 9 | 4A | input | Input A of inverter channel 4; each gate performs Y = A in positive logic. |
| 10 | 5Y | output | Output Y of inverter channel 5, the logical inverse of input 5A. |
| 11 | 5A | input | Input A of inverter channel 5; each gate performs Y = A in positive logic. |
| 12 | 6Y | output | Output Y of inverter channel 6, the logical inverse of input 6A. |
| 13 | 6A | input | Input A of inverter channel 6; each gate performs Y = A in positive logic. |
| 14 | VCC | power_in | Positive supply; the recommended supply range is 2 V to 6 V (nominal 5 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | PDIP-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 2 | 5 | 6 | V | 4 | |
| High-level input voltage | VIH | 1.5 | V | VCC = 2 V | 4 | ||
| High-level input voltage | VIH | 3.15 | V | VCC = 4.5 V | 4 | ||
| High-level input voltage | VIH | 4.2 | V | VCC = 6 V | 4 | ||
| Low-level input voltage | VIL | 0.5 | V | VCC = 2 V | 4 | ||
| Low-level input voltage | VIL | 1.35 | V | VCC = 4.5 V | 4 | ||
| Low-level input voltage | VIL | 1.8 | V | VCC = 6 V | 4 | ||
| Input transition rise and fall rate | Δt/Δv | 1000 | ns | VCC = 2 V | 4 | ||
| Input transition rise and fall rate | Δt/Δv | 500 | ns | VCC = 4.5 V | 4 | ||
| Input transition rise and fall rate | Δt/Δv | 400 | ns | VCC = 6 V | 4 | ||
| Operating free-air temperature | TA | -40 | 85 | °C | SN74HC04 | 4 | |
| Supply voltage | VCC | -0.5 | 7 | V | 4 | ||
| Input clamp current | IIK | -20 | 20 | mA | VI < 0 or VI > VCC | 4 | |
| Output clamp current | IOK | -20 | 20 | mA | VO < 0 | 4 | |
| Continuous output current | IO | -25 | 25 | mA | VO = 0 to VCC | 4 | |
| Continuous current through VCC or GND | -50 | 50 | mA | 4 | |||
| Junction temperature | TJ | 150 | °C | 4 | |||
| Storage temperature | Tstg | -60 | 150 | °C | 4 | ||
| High-level output voltage | VOH | 1.9 | 1.998 | V | VI = VIH or VIL; IOH = -20 µA; VCC = 2 V; TA = 25°C | 5 | |
| High-level output voltage | VOH | 1.9 | V | VI = VIH or VIL; IOH = -20 µA; VCC = 2 V; TA = -40°C to 85°C | 5 | ||
| High-level output voltage | VOH | 4.4 | 4.499 | V | VI = VIH or VIL; IOH = -20 µA; VCC = 4.5 V; TA = 25°C | 5 | |
| High-level output voltage | VOH | 4.4 | V | VI = VIH or VIL; IOH = -20 µA; VCC = 4.5 V; TA = -40°C to 85°C | 5 | ||
| High-level output voltage | VOH | 5.9 | 5.999 | V | VI = VIH or VIL; IOH = -20 µA; VCC = 6 V; TA = 25°C | 5 | |
| High-level output voltage | VOH | 5.9 | V | VI = VIH or VIL; IOH = -20 µA; VCC = 6 V; TA = -40°C to 85°C | 5 | ||
| High-level output voltage | VOH | 3.98 | 4.3 | V | VI = VIH or VIL; IOH = -4 mA; VCC = 4.5 V; TA = 25°C | 5 | |
| High-level output voltage | VOH | 3.84 | V | VI = VIH or VIL; IOH = -4 mA; VCC = 4.5 V; TA = -40°C to 85°C | 5 | ||
| High-level output voltage | VOH | 5.48 | 5.8 | V | VI = VIH or VIL; IOH = -5.2 mA; VCC = 6 V; TA = 25°C | 5 | |
| High-level output voltage | VOH | 5.34 | V | VI = VIH or VIL; IOH = -5.2 mA; VCC = 6 V; TA = -40°C to 85°C | 5 | ||
| Low-level output voltage | VOL | 0.002 | 0.1 | V | VI = VIH or VIL; IOL = 20 µA; VCC = 2 V; TA = 25°C | 5 | |
| Low-level output voltage | VOL | 0.1 | V | VI = VIH or VIL; IOL = 20 µA; VCC = 2 V; TA = -40°C to 85°C | 5 | ||
| Low-level output voltage | VOL | 0.001 | 0.1 | V | VI = VIH or VIL; IOL = 20 µA; VCC = 4.5 V; TA = 25°C | 5 | |
| Low-level output voltage | VOL | 0.17 | 0.26 | V | VI = VIH or VIL; IOL = 4 mA; VCC = 4.5 V; TA = 25°C | 5 | |
| Low-level output voltage | VOL | 0.33 | V | VI = VIH or VIL; IOL = 4 mA; VCC = 4.5 V; TA = -40°C to 85°C | 5 | ||
| Low-level output voltage | VOL | 0.15 | 0.26 | V | VI = VIH or VIL; IOL = 5.2 mA; VCC = 6 V; TA = 25°C | 5 | |
| Input leakage current | II | -1 | 0.1 | 1 | µA | VI = VCC or 0; VCC = 6 V; TA = 25°C | 5 |
| Input leakage current | II | -1 | 1 | µA | VI = VCC or 0; VCC = 6 V; TA = -40°C to 85°C | 5 | |
| Supply current | ICC | 2 | 20 | µA | VI = VCC or 0; VCC = 6 V; TA = 25°C | 5 | |
| Input capacitance | Ci | 3 | 10 | pF | VCC = 2 V to 6 V; TA = 25°C | 5 | |
| Input capacitance | Ci | 10 | pF | VCC = 2 V to 6 V; TA = -40°C to 85°C | 5 | ||
| Propagation delay, A to Y | tpd | 45 | 95 | ns | VCC = 2 V; TA = 25°C | 6 | |
| Propagation delay, A to Y | tpd | 120 | ns | VCC = 2 V; TA = -40°C to 85°C | 6 | ||
| Propagation delay, A to Y | tpd | 9 | 19 | ns | VCC = 4.5 V; TA = 25°C | 6 | |
| Propagation delay, A to Y | tpd | 24 | ns | VCC = 4.5 V; TA = -40°C to 85°C | 6 | ||
| Propagation delay, A to Y | tpd | 8 | 16 | ns | VCC = 6 V; TA = 25°C | 6 | |
| Propagation delay, A to Y | tpd | 20 | ns | VCC = 6 V; TA = -40°C to 85°C | 6 | ||
| Transition time, Y | tt | 38 | 75 | ns | VCC = 2 V; TA = 25°C | 6 | |
| Transition time, Y | tt | 95 | ns | VCC = 2 V; TA = -40°C to 85°C | 6 | ||
| Transition time, Y | tt | 8 | 15 | ns | VCC = 4.5 V; TA = 25°C | 6 | |
| Transition time, Y | tt | 19 | ns | VCC = 4.5 V; TA = -40°C to 85°C | 6 | ||
| Transition time, Y | tt | 6 | 13 | ns | VCC = 6 V; TA = 25°C | 6 | |
| Transition time, Y | tt | 16 | ns | VCC = 6 V; TA = -40°C to 85°C | 6 | ||
| Junction-to-ambient thermal resistance | RθJA | 60.7 | °C/W | N (PDIP) package, 14 pins | 5 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 47.8 | °C/W | N (PDIP) package, 14 pins | 5 | ||
| Junction-to-board thermal resistance | RθJB | 40.6 | °C/W | N (PDIP) package, 14 pins | 5 | ||
| Junction-to-top characterization parameter | ΨJT | 26.9 | °C/W | N (PDIP) package, 14 pins | 5 | ||
| Junction-to-board characterization parameter | ΨJB | 40.3 | °C/W | N (PDIP) package, 14 pins | 5 |
CAD (KiCad official)
- Symbol:
SN74HC04NE4 - Footprint:
Package_DIP:DIP-14_W7.62mm - 3D model: PDIP-14 (KiCad packages3D, STEP)
- 3D model files:
sn74hc04ne4-etched.step/sn74hc04ne4-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74hc04ne4.step/sn74hc04ne4.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (32 pp, sha256
51c8a2a7f83b4f01, retrieved 2026-10-16, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SN74HC04NE4
**Texas Instruments** · Inverters · PDIP-14
SN74HC04NE4 from Texas Instruments, in a PDIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Input A of inverter channel 1; each gate performs Y = A in positive logic. |
| 2 | 1Y | output | Output Y of inverter channel 1, the logical inverse of input 1A. |
| 3 | 2A | input | Input A of inverter channel 2; each gate performs Y = A in positive logic. |
| 4 | 2Y | output | Output Y of inverter channel 2, the logical inverse of input 2A. |
| 5 | 3A | input | Input A of inverter channel 3; each gate performs Y = A in positive logic. |
| 6 | 3Y | output | Output Y of inverter channel 3, the logical inverse of input 3A. |
| 7 | GND | power_in | Ground reference for the device. |
| 8 | 4Y | output | Output Y of inverter channel 4, the logical inverse of input 4A. |
| 9 | 4A | input | Input A of inverter channel 4; each gate performs Y = A in positive logic. |
| 10 | 5Y | output | Output Y of inverter channel 5, the logical inverse of input 5A. |
| 11 | 5A | input | Input A of inverter channel 5; each gate performs Y = A in positive logic. |
| 12 | 6Y | output | Output Y of inverter channel 6, the logical inverse of input 6A. |
| 13 | 6A | input | Input A of inverter channel 6; each gate performs Y = A in positive logic. |
| 14 | VCC | power_in | Positive supply; the recommended supply range is 2 V to 6 V (nominal 5 V). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | PDIP-14 |
| Category | Logic |
| Pins | 14 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 2 | 5 | 6 | V | | 4 |
| High-level input voltage | VIH | 1.5 | | | V | VCC = 2 V | 4 |
| High-level input voltage | VIH | 3.15 | | | V | VCC = 4.5 V | 4 |
| High-level input voltage | VIH | 4.2 | | | V | VCC = 6 V | 4 |
| Low-level input voltage | VIL | | | 0.5 | V | VCC = 2 V | 4 |
| Low-level input voltage | VIL | | | 1.35 | V | VCC = 4.5 V | 4 |
| Low-level input voltage | VIL | | | 1.8 | V | VCC = 6 V | 4 |
| Input transition rise and fall rate | Δt/Δv | | | 1000 | ns | VCC = 2 V | 4 |
| Input transition rise and fall rate | Δt/Δv | | | 500 | ns | VCC = 4.5 V | 4 |
| Input transition rise and fall rate | Δt/Δv | | | 400 | ns | VCC = 6 V | 4 |
| Operating free-air temperature | TA | -40 | | 85 | °C | SN74HC04 | 4 |
| Supply voltage | VCC | -0.5 | | 7 | V | | 4 |
| Input clamp current | IIK | -20 | | 20 | mA | VI < 0 or VI > VCC | 4 |
| Output clamp current | IOK | -20 | | 20 | mA | VO < 0 | 4 |
| Continuous output current | IO | -25 | | 25 | mA | VO = 0 to VCC | 4 |
| Continuous current through VCC or GND | | -50 | | 50 | mA | | 4 |
| Junction temperature | TJ | | | 150 | °C | | 4 |
| Storage temperature | Tstg | -60 | | 150 | °C | | 4 |
| High-level output voltage | VOH | 1.9 | 1.998 | | V | VI = VIH or VIL; IOH = -20 µA; VCC = 2 V; TA = 25°C | 5 |
| High-level output voltage | VOH | 1.9 | | | V | VI = VIH or VIL; IOH = -20 µA; VCC = 2 V; TA = -40°C to 85°C | 5 |
| High-level output voltage | VOH | 4.4 | 4.499 | | V | VI = VIH or VIL; IOH = -20 µA; VCC = 4.5 V; TA = 25°C | 5 |
| High-level output voltage | VOH | 4.4 | | | V | VI = VIH or VIL; IOH = -20 µA; VCC = 4.5 V; TA = -40°C to 85°C | 5 |
| High-level output voltage | VOH | 5.9 | 5.999 | | V | VI = VIH or VIL; IOH = -20 µA; VCC = 6 V; TA = 25°C | 5 |
| High-level output voltage | VOH | 5.9 | | | V | VI = VIH or VIL; IOH = -20 µA; VCC = 6 V; TA = -40°C to 85°C | 5 |
| High-level output voltage | VOH | 3.98 | 4.3 | | V | VI = VIH or VIL; IOH = -4 mA; VCC = 4.5 V; TA = 25°C | 5 |
| High-level output voltage | VOH | 3.84 | | | V | VI = VIH or VIL; IOH = -4 mA; VCC = 4.5 V; TA = -40°C to 85°C | 5 |
| High-level output voltage | VOH | 5.48 | 5.8 | | V | VI = VIH or VIL; IOH = -5.2 mA; VCC = 6 V; TA = 25°C | 5 |
| High-level output voltage | VOH | 5.34 | | | V | VI = VIH or VIL; IOH = -5.2 mA; VCC = 6 V; TA = -40°C to 85°C | 5 |
| Low-level output voltage | VOL | | 0.002 | 0.1 | V | VI = VIH or VIL; IOL = 20 µA; VCC = 2 V; TA = 25°C | 5 |
| Low-level output voltage | VOL | | | 0.1 | V | VI = VIH or VIL; IOL = 20 µA; VCC = 2 V; TA = -40°C to 85°C | 5 |
| Low-level output voltage | VOL | | 0.001 | 0.1 | V | VI = VIH or VIL; IOL = 20 µA; VCC = 4.5 V; TA = 25°C | 5 |
| Low-level output voltage | VOL | | 0.17 | 0.26 | V | VI = VIH or VIL; IOL = 4 mA; VCC = 4.5 V; TA = 25°C | 5 |
| Low-level output voltage | VOL | | | 0.33 | V | VI = VIH or VIL; IOL = 4 mA; VCC = 4.5 V; TA = -40°C to 85°C | 5 |
| Low-level output voltage | VOL | | 0.15 | 0.26 | V | VI = VIH or VIL; IOL = 5.2 mA; VCC = 6 V; TA = 25°C | 5 |
| Input leakage current | II | -1 | 0.1 | 1 | µA | VI = VCC or 0; VCC = 6 V; TA = 25°C | 5 |
| Input leakage current | II | -1 | | 1 | µA | VI = VCC or 0; VCC = 6 V; TA = -40°C to 85°C | 5 |
| Supply current | ICC | | 2 | 20 | µA | VI = VCC or 0; VCC = 6 V; TA = 25°C | 5 |
| Input capacitance | Ci | | 3 | 10 | pF | VCC = 2 V to 6 V; TA = 25°C | 5 |
| Input capacitance | Ci | | | 10 | pF | VCC = 2 V to 6 V; TA = -40°C to 85°C | 5 |
| Propagation delay, A to Y | tpd | | 45 | 95 | ns | VCC = 2 V; TA = 25°C | 6 |
| Propagation delay, A to Y | tpd | | | 120 | ns | VCC = 2 V; TA = -40°C to 85°C | 6 |
| Propagation delay, A to Y | tpd | | 9 | 19 | ns | VCC = 4.5 V; TA = 25°C | 6 |
| Propagation delay, A to Y | tpd | | | 24 | ns | VCC = 4.5 V; TA = -40°C to 85°C | 6 |
| Propagation delay, A to Y | tpd | | 8 | 16 | ns | VCC = 6 V; TA = 25°C | 6 |
| Propagation delay, A to Y | tpd | | | 20 | ns | VCC = 6 V; TA = -40°C to 85°C | 6 |
| Transition time, Y | tt | | 38 | 75 | ns | VCC = 2 V; TA = 25°C | 6 |
| Transition time, Y | tt | | | 95 | ns | VCC = 2 V; TA = -40°C to 85°C | 6 |
| Transition time, Y | tt | | 8 | 15 | ns | VCC = 4.5 V; TA = 25°C | 6 |
| Transition time, Y | tt | | | 19 | ns | VCC = 4.5 V; TA = -40°C to 85°C | 6 |
| Transition time, Y | tt | | 6 | 13 | ns | VCC = 6 V; TA = 25°C | 6 |
| Transition time, Y | tt | | | 16 | ns | VCC = 6 V; TA = -40°C to 85°C | 6 |
| Junction-to-ambient thermal resistance | RθJA | | 60.7 | | °C/W | N (PDIP) package, 14 pins | 5 |
| Junction-to-case (top) thermal resistance | RθJC(top) | | 47.8 | | °C/W | N (PDIP) package, 14 pins | 5 |
| Junction-to-board thermal resistance | RθJB | | 40.6 | | °C/W | N (PDIP) package, 14 pins | 5 |
| Junction-to-top characterization parameter | ΨJT | | 26.9 | | °C/W | N (PDIP) package, 14 pins | 5 |
| Junction-to-board characterization parameter | ΨJB | | 40.3 | | °C/W | N (PDIP) package, 14 pins | 5 |
## CAD (KiCad official)
- Symbol: `SN74HC04NE4`
- Footprint: `Package_DIP:DIP-14_W7.62mm`
- 3D model: PDIP-14 (KiCad packages3D, STEP)
- 3D model files: `sn74hc04ne4-etched.step` / `sn74hc04ne4-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74hc04ne4.step` / `sn74hc04ne4.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603356590745395200) (32 pp, sha256 `51c8a2a7f83b4f01`, retrieved 2026-10-16, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sn74hc04ne4-datasheet.pdf)