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SN74HC02QDRQ1
Public Made by Adomby adom
Texas Instruments Logic Gates, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SN74HC02QDRQ1
Texas Instruments · Logic Gates · SOIC-14
SN74HC02QDRQ1 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1Y | output | NOR output Y of gate 1 (Y = 1A NOR 1B), voltage 0 to VCC. |
| 2 | 1A | input | Input A of NOR gate 1, voltage 0 to VCC, input capacitance 3-10 pF. |
| 3 | 1B | input | Input B of NOR gate 1, voltage 0 to VCC, input capacitance 3-10 pF. |
| 4 | 2Y | output | NOR output Y of gate 2 (Y = 2A NOR 2B), voltage 0 to VCC. |
| 5 | 2A | input | Input A of NOR gate 2, voltage 0 to VCC, input capacitance 3-10 pF. |
| 6 | 2B | input | Input B of NOR gate 2, voltage 0 to VCC, input capacitance 3-10 pF. |
| 7 | GND | power_in | Ground, negative supply reference. |
| 8 | 3A | input | Input A of NOR gate 3, voltage 0 to VCC, input capacitance 3-10 pF. |
| 9 | 3B | input | Input B of NOR gate 3, voltage 0 to VCC, input capacitance 3-10 pF. |
| 10 | 3Y | output | NOR output Y of gate 3 (Y = 3A NOR 3B), voltage 0 to VCC. |
| 11 | 4A | input | Input A of NOR gate 4, voltage 0 to VCC, input capacitance 3-10 pF. |
| 12 | 4B | input | Input B of NOR gate 4, voltage 0 to VCC, input capacitance 3-10 pF. |
| 13 | 4Y | output | NOR output Y of gate 4 (Y = 4A NOR 4B), voltage 0 to VCC. |
| 14 | VCC | power_in | Positive supply voltage, operating range 2V to 6V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
SN74HC02QDRQ1 - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
sn74hc02qdrq1-etched.step/sn74hc02qdrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74hc02qdrq1.step/sn74hc02qdrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (23 pp, sha256
c58353d834857b68, retrieved 2026-10-05, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SN74HC02QDRQ1
**Texas Instruments** · Logic Gates · SOIC-14
SN74HC02QDRQ1 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1Y | output | NOR output Y of gate 1 (Y = 1A NOR 1B), voltage 0 to VCC. |
| 2 | 1A | input | Input A of NOR gate 1, voltage 0 to VCC, input capacitance 3-10 pF. |
| 3 | 1B | input | Input B of NOR gate 1, voltage 0 to VCC, input capacitance 3-10 pF. |
| 4 | 2Y | output | NOR output Y of gate 2 (Y = 2A NOR 2B), voltage 0 to VCC. |
| 5 | 2A | input | Input A of NOR gate 2, voltage 0 to VCC, input capacitance 3-10 pF. |
| 6 | 2B | input | Input B of NOR gate 2, voltage 0 to VCC, input capacitance 3-10 pF. |
| 7 | GND | power_in | Ground, negative supply reference. |
| 8 | 3A | input | Input A of NOR gate 3, voltage 0 to VCC, input capacitance 3-10 pF. |
| 9 | 3B | input | Input B of NOR gate 3, voltage 0 to VCC, input capacitance 3-10 pF. |
| 10 | 3Y | output | NOR output Y of gate 3 (Y = 3A NOR 3B), voltage 0 to VCC. |
| 11 | 4A | input | Input A of NOR gate 4, voltage 0 to VCC, input capacitance 3-10 pF. |
| 12 | 4B | input | Input B of NOR gate 4, voltage 0 to VCC, input capacitance 3-10 pF. |
| 13 | 4Y | output | NOR output Y of gate 4 (Y = 4A NOR 4B), voltage 0 to VCC. |
| 14 | VCC | power_in | Positive supply voltage, operating range 2V to 6V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
## CAD (KiCad official)
- Symbol: `SN74HC02QDRQ1`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files: `sn74hc02qdrq1-etched.step` / `sn74hc02qdrq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74hc02qdrq1.step` / `sn74hc02qdrq1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn74hc02-q1) (23 pp, sha256 `c58353d834857b68`, retrieved 2026-10-05, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sn74hc02qdrq1-datasheet.pdf)