component

SN74HC02DBR

Public Made by Adom

by adom

Texas Instruments Logic Gates, SSOP-14-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogicsn74hc02dbrfactory-2.0.0extractor-text

Verified SN74HC02DBR

by Ray · last 5 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

5 Nov 2026RayPublished by the parts factory: tier mfr, 14 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: SN74HC02DBR · SSOP-14-208mil · 14 pins
  • ✓copper: 14 copper pads, none touching another net
  • ✓datasheet: all 14 pin names found in the 43-page datasheet
  • ✓distributor: lcsc C2867026, digikey 296-8204-2-ND, mouser 595-SN74HC02DBR
  • ✓family: SSOP-14_5.3x6.2mm_P0.65mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-z09diqox/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 14 pins = 14 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 14 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ sn74hc02dbr.kicad_sym✓ sn74hc02dbr.kicad_mod✓ sn74hc02dbr.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 2h ago
viewers sn74hc02dbr: viewers · Ray 2h ago
package.json Publish 0.1.0 · Ray 2h ago
page.json Set visibility: public · Ray 2h ago
README.md Publish 0.1.0 · Ray 2h ago
sn74hc02dbr-etched.glb Publish 0.1.0 · Ray 2h ago
sn74hc02dbr-etched.step sn74hc02dbr: factory component page (tier=mfr) · Ray 2h ago
sn74hc02dbr-hero.glb sn74hc02dbr: hero GLB from the etched model (keeps the MPN mark) · Ray 2h ago
sn74hc02dbr-hero.overlay.json Publish 0.1.0 · Ray 2h ago
sn74hc02dbr.glb Publish 0.1.0 · Ray 2h ago
sn74hc02dbr.kicad_mod Publish 0.1.0 · Ray 2h ago
sn74hc02dbr.kicad_sym Publish 0.1.0 · Ray 2h ago
sn74hc02dbr.lbr Publish 0.1.0 · Ray 2h ago
sn74hc02dbr.step Publish 0.1.0 · Ray 2h ago
verification.json Verified: Published by the parts factory: tier mfr, 14 pins · Ray 2h ago

SN74HC02DBR

Texas Instruments · Logic Gates · SSOP-14-208mil

SN74HC02DBR from Texas Instruments, in a SSOP-14-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1Y output Output of gate channel 1, implementing Y = A + B in positive logic.
2 1A input Input A of gate channel 1, a buffered input of the 2-input NOR gate.
3 1B input Input B of gate channel 1, a buffered input of the 2-input NOR gate.
4 2Y output Output of gate channel 2, implementing Y = A + B in positive logic.
5 2A input Input A of gate channel 2, a buffered input of the 2-input NOR gate.
6 2B input Input B of gate channel 2, a buffered input of the 2-input NOR gate.
7 GND power_in Ground reference for the device.
8 3A input Input A of gate channel 3, a buffered input of the 2-input NOR gate.
9 3B input Input B of gate channel 3, a buffered input of the 2-input NOR gate.
10 3Y output Output of gate channel 3, implementing Y = A + B in positive logic.
11 4A input Input A of gate channel 4, a buffered input of the 2-input NOR gate.
12 4B input Input B of gate channel 4, a buffered input of the 2-input NOR gate.
13 4Y output Output of gate channel 4, implementing Y = A + B in positive logic.
14 VCC power_in Positive supply, with VCC specified from 2 V to 6 V in the recommended operating conditions.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SSOP-14-208mil
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 2 5 6 V Recommended operating conditions 4
High-level input voltage VIH 1.5 V VCC = 2 V 4
High-level input voltage VIH 3.15 V VCC = 4.5 V 4
High-level input voltage VIH 4.2 V VCC = 6 V 4
Low-level input voltage VIL 0.5 V VCC = 2 V 4
Low-level input voltage VIL 1.35 V VCC = 4.5 V 4
Low-level input voltage VIL 1.8 V VCC = 6 V 4
Operating free-air temperature TA -40 85 °C SN74 commercial (row printed as SN74HC00) 4
Supply voltage VCC -0.5 7 V Absolute maximum ratings 4
Input clamp current IIK -20 20 mA VI < 0 V or VI > VCC 4
Output clamp current IOK -20 20 mA VO < 0 V or VO > VCC 4
Continuous output current IO -25 25 mA VO = 0 to VCC 4
Continuous current through VCC or GND -50 50 mA 4
Junction temperature TJ 150 °C 4
Storage temperature Tstg -65 150 °C 4
Junction-to-ambient thermal resistance RθJA 105.4 °C/W DB (SSOP) 14-pin package 5
Junction-to-case (top) thermal resistance RθJC(top) 57.3 °C/W DB (SSOP) 14-pin package 5
Junction-to-board thermal resistance RθJB 52.7 °C/W DB (SSOP) 14-pin package 5
Junction-to-top characterization parameter ΨJT 22.6 °C/W DB (SSOP) 14-pin package 5
Junction-to-board characterization parameter ΨJB 52.2 °C/W DB (SSOP) 14-pin package 5
High-level output voltage VOH 1.9 1.998 V VI = VIH or VIL, IOH = -20 µA, VCC = 2 V, TA = -40 to 85°C (min) 5
High-level output voltage VOH 4.4 4.499 V VI = VIH or VIL, IOH = -20 µA, VCC = 4.5 V, TA = -40 to 85°C (min) 5
High-level output voltage VOH 5.9 5.999 V VI = VIH or VIL, IOH = -20 µA, VCC = 6 V, TA = -40 to 85°C (min) 5
High-level output voltage VOH 3.84 4.3 V VI = VIH or VIL, IOH = -4 mA, VCC = 4.5 V, TA = -40 to 85°C (min) 5
High-level output voltage VOH 5.34 5.8 V VI = VIH or VIL, IOH = -5.2 mA, VCC = 6 V, TA = -40 to 85°C (min) 5
Low-level output voltage VOL 0.002 0.1 V VI = VIH or VIL, IOL = 20 µA, VCC = 2 V, TA = -40 to 85°C (max) 5
Low-level output voltage VOL 0.001 0.1 V VI = VIH or VIL, IOL = 20 µA, VCC = 4.5 V, TA = -40 to 85°C (max) 5
Low-level output voltage VOL 0.17 0.33 V VI = VIH or VIL, IOL = 4 mA, VCC = 4.5 V, TA = -40 to 85°C (max) 5
Low-level output voltage VOL 0.15 0.33 V VI = VIH or VIL, IOL = 5.2 mA, VCC = 6 V, TA = -40 to 85°C (max) 5
Input leakage current II -1000 0.1 1000 nA VI = VCC or 0, VCC = 6 V, TA = -40 to 85°C 5
Supply current ICC 2 20 µA VI = VCC or 0, VCC = 6 V, TA = -40 to 85°C 5
Input capacitance Ci 3 10 pF VCC = 2 V to 6 V 5
Propagation delay A or B to Y tpd 45 115 ns VCC = 2 V, TA = -40 to 85°C 6
Propagation delay A or B to Y tpd 9 23 ns VCC = 4.5 V, TA = -40 to 85°C 6
Propagation delay A or B to Y tpd 8 20 ns VCC = 6 V, TA = -40 to 85°C 6
Transition-time Y tt 38 95 ns VCC = 2 V, TA = -40 to 85°C 6
Transition-time Y tt 8 19 ns VCC = 4.5 V, TA = -40 to 85°C 6
Transition-time Y tt 6 16 ns VCC = 6 V, TA = -40 to 85°C 6

CAD (KiCad official)

  • Symbol: SN74HC02DBR
  • Footprint: Package_SO:SSOP-14_5.3x6.2mm_P0.65mm
  • 3D model: SSOP-14-208mil (KiCad packages3D, STEP)
  • 3D model files: sn74hc02dbr-etched.step / sn74hc02dbr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74hc02dbr.step / sn74hc02dbr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (43 pp, sha256 f64ad49f1186e95c, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF