main
Ray sn74hc02: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) 3713c89
{
  "schema_version": 1,
  "type": "component",
  "slug": "sn74hc02",
  "title": "SN74HC02",
  "brief": "TI quad 2-input NOR gate, SOIC-14. Output high only when both inputs low. HC CMOS 2-6 V. Datasheet-verified.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "logic",
    "nor",
    "gate",
    "74hc",
    "soic-14",
    "texas-instruments"
  ],
  "component": {
    "mpn": "SN74HC02",
    "manufacturer": "Texas Instruments",
    "package": "SOIC-14",
    "pin_count": 14,
    "category": "Logic IC",
    "subcategory": "Quad 2-input NOR gate",
    "datasheet": "https://www.ti.com/lit/ds/symlink/sn74hc02.pdf",
    "parts": {
      "symbol": "sn74hc02.kicad_sym",
      "footprint": "sn74hc02.kicad_mod",
      "model_3d": "sn74hc02-etched.glb",
      "model_3d_plain": "sn74hc02.glb",
      "lbr": "sn74hc02.lbr",
      "model_3d_step": "sn74hc02-etched.step",
      "model_3d_step_plain": "sn74hc02.step"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "1Y",
        "type": "output",
        "description": "Channel 1 NOR gate output Y = NOT(1A + 1B). Balanced CMOS push-pull output; ±4 mA drive at VCC = 4.5 V."
      },
      {
        "number": "2",
        "name": "1A",
        "type": "input",
        "description": "Channel 1 NOR gate input A. Standard CMOS high-impedance input; VIH ≥ 3.15 V and VIL ≤ 1.35 V at VCC = 4.5 V."
      },
      {
        "number": "3",
        "name": "1B",
        "type": "input",
        "description": "Channel 1 NOR gate input B. Standard CMOS high-impedance input; VIH ≥ 3.15 V and VIL ≤ 1.35 V at VCC = 4.5 V."
      },
      {
        "number": "4",
        "name": "2Y",
        "type": "output",
        "description": "Channel 2 NOR gate output Y = NOT(2A + 2B). Balanced CMOS push-pull output; ±4 mA drive at VCC = 4.5 V."
      },
      {
        "number": "5",
        "name": "2A",
        "type": "input",
        "description": "Channel 2 NOR gate input A. Standard CMOS high-impedance input."
      },
      {
        "number": "6",
        "name": "2B",
        "type": "input",
        "description": "Channel 2 NOR gate input B. Standard CMOS high-impedance input."
      },
      {
        "number": "7",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference (0 V). Supply return for all four NOR gates."
      },
      {
        "number": "8",
        "name": "3A",
        "type": "input",
        "description": "Channel 3 NOR gate input A. Standard CMOS high-impedance input."
      },
      {
        "number": "9",
        "name": "3B",
        "type": "input",
        "description": "Channel 3 NOR gate input B. Standard CMOS high-impedance input."
      },
      {
        "number": "10",
        "name": "3Y",
        "type": "output",
        "description": "Channel 3 NOR gate output Y = NOT(3A + 3B). Balanced CMOS push-pull output; ±4 mA drive at VCC = 4.5 V."
      },
      {
        "number": "11",
        "name": "4A",
        "type": "input",
        "description": "Channel 4 NOR gate input A. Standard CMOS high-impedance input."
      },
      {
        "number": "12",
        "name": "4B",
        "type": "input",
        "description": "Channel 4 NOR gate input B. Standard CMOS high-impedance input."
      },
      {
        "number": "13",
        "name": "4Y",
        "type": "output",
        "description": "Channel 4 NOR gate output Y = NOT(4A + 4B). Balanced CMOS push-pull output; ±4 mA drive at VCC = 4.5 V."
      },
      {
        "number": "14",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply rail. Operating range 2 V to 6 V (absolute max 7 V). Bypass with a 100 nF ceramic to GND close to the pin."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/sn74hc02.pdf",
        "pages": 43,
        "sha256": "c00a60e986d9a3bc",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 14,
        "described": 14,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "logic": {
      "family_id": "74HC02",
      "logic_family": "74HC",
      "function_code": "02",
      "function_class": "Gate",
      "function_name": "Quad 2-Input NOR Gate",
      "manufacturer": "Texas Instruments",
      "is_specialty": false
    },
    "models_3d": [
      {
        "file": "sn74hc02.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          8.7,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "3b9a775da256c8afcc28dcddfbc2eb3f266107fe61ce8446d96f2c52b6f44a70",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "sn74hc02-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          8.7,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "451145a6a7a14b87e1f01394b5d92001b61ab97ef3f582402a913c28e53e3204",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Type": "Quad 2-input NOR gate",
      "Gates": "4 independent",
      "Function": "Y = NOT (A OR B)",
      "Logic family": "HC (high-speed CMOS)",
      "Supply voltage": "2-6 V",
      "Pin note": "output-first order (1Y, 1A, 1B)",
      "Package": "SOIC-14",
      "Body (L×W×H)": "8.65 × 3.9 × 1.75 mm"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "sn74hc02",
    "74hc02",
    "nor gate",
    "quad nor",
    "logic nor"
  ],
  "discovery_pitch": "SN74HC02 quad 2-input NOR gate (SOIC-14) with datasheet-verified pinout, KiCad symbol/footprint/3D, and full provenance.",
  "author": {
    "name": "Ray"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "sn74hc02.kicad_sym",
    "sn74hc02.kicad_mod",
    "sn74hc02.glb",
    "sn74hc02.lbr",
    "docs/hero.png",
    "docs/sn74hc02-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "sn74hc02-etched.step"
  ],
  "variants": [
    {
      "mpn": "SN74HC02D (SOIC-14, tube)",
      "kind": "packaging"
    },
    {
      "mpn": "SN74HC02DR (SOIC-14, tape & reel)",
      "kind": "packaging"
    }
  ]
}