component
SN74HC01N
Public Made by Adomby adom
lingxingic Logic Gates, DIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 8d ago |
| viewers | 8d ago |
| package.json | 8d ago |
| page.json | 8d ago |
| README.md | 8d ago |
| sn74hc01n-etched.glb | 8d ago |
| sn74hc01n-etched.step | 8d ago |
| sn74hc01n-hero.glb | 8d ago |
| sn74hc01n-hero.overlay.json | 8d ago |
| sn74hc01n.glb | 8d ago |
| sn74hc01n.kicad_mod | 8d ago |
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| sn74hc01n.lbr | 8d ago |
| sn74hc01n.step | 8d ago |
SN74HC01N
lingxingic · Logic Gates · DIP-14
SN74HC01N from lingxingic, in a DIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1Y | output | Gate 1 open-drain data output that goes LOW only when 1A and 1B are both HIGH and is high-impedance (Z) otherwise. |
| 2 | 1A | input | Gate 1 data input A, one of the two inputs of the 2-input NAND gate. |
| 3 | 1B | input | Gate 1 data input B, one of the two inputs of the 2-input NAND gate. |
| 4 | 2Y | output | Gate 2 open-drain data output that goes LOW only when 2A and 2B are both HIGH and is high-impedance (Z) otherwise. |
| 5 | 2A | input | Gate 2 data input A, one of the two inputs of the 2-input NAND gate. |
| 6 | 2B | input | Gate 2 data input B, one of the two inputs of the 2-input NAND gate. |
| 7 | GND | power_in | Ground reference, 0 V. |
| 8 | 3A | input | Gate 3 data input A, one of the two inputs of the 2-input NAND gate. |
| 9 | 3B | input | Gate 3 data input B, one of the two inputs of the 2-input NAND gate. |
| 10 | 3Y | output | Gate 3 open-drain data output that goes LOW only when 3A and 3B are both HIGH and is high-impedance (Z) otherwise. |
| 11 | 4A | input | Gate 4 data input A, one of the two inputs of the 2-input NAND gate. |
| 12 | 4B | input | Gate 4 data input B, one of the two inputs of the 2-input NAND gate. |
| 13 | 4Y | output | Gate 4 open-drain data output that goes LOW only when 4A and 4B are both HIGH and is high-impedance (Z) otherwise. |
| 14 | VCC | power_in | Supply voltage; the SN74HC01 is specified at 2.0 V to 6.0 V (typ. 5.0 V) in the recommended operating conditions. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | lingxingic |
| Package | DIP-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| supply voltage | VCC | -0.5 | 7 | V | 6 | ||
| supply current | ICC | 50 | mA | 6 | |||
| ground current | IGND | -50 | mA | 6 | |||
| input clamping current | IIK | -20 | 20 | mA | VI < -0.5V or VI > VCC+0.5V | 6 | |
| output clamping current | IOK | -20 | 20 | mA | VO < -0.5V or VO > VCC+0.5V | 6 | |
| output current | IO | -25 | 25 | mA | -0.5V < VO < VCC+0.5V | 6 | |
| storage temperature | Tstg | -65 | 150 | ℃ | 6 | ||
| soldering temperature | TL | 245 | ℃ | 10s DIP | 6 | ||
| supply voltage | VCC | 2 | 5 | 6 | V | 6 | |
| input voltage | VI | 0 | V | 6 | |||
| output voltage | VO | 0 | V | 6 | |||
| ambient temperature | Tamb | -40 | 125 | ℃ | 6 | ||
| HIGH-level input voltage | VIH | 1.5 | 1.2 | V | Tamb=-40℃ to +85℃; VCC=2.0V | 7 | |
| HIGH-level input voltage | VIH | 3.15 | 2.4 | V | Tamb=-40℃ to +85℃; VCC=4.5V | 7 | |
| HIGH-level input voltage | VIH | 4.2 | 3.2 | V | Tamb=-40℃ to +85℃; VCC=6.0V | 7 | |
| LOW-level input voltage | VIL | 0.8 | 0.5 | V | Tamb=-40℃ to +85℃; VCC=2.0V | 7 | |
| LOW-level input voltage | VIL | 2.1 | 1.35 | V | Tamb=-40℃ to +85℃; VCC=4.5V | 7 | |
| LOW-level input voltage | VIL | 2.8 | 1.8 | V | Tamb=-40℃ to +85℃; VCC=6.0V | 7 | |
| LOW-level output voltage | VOL | 0 | 0.1 | V | Tamb=-40℃ to +85℃; VCC=2.0V; IO=20uA | 7 | |
| LOW-level output voltage | VOL | 0.15 | 0.33 | V | Tamb=-40℃ to +85℃; VCC=4.5V; IO=4.0mA | 7 | |
| LOW-level output voltage | VOL | 0.16 | 0.33 | V | Tamb=-40℃ to +85℃; VCC=6.0V; IO=5.2mA | 7 | |
| input leakage current | II | -1 | 1 | uA | Tamb=-40℃ to +85℃; VCC=6.0V; VI=VCC or GND | 7 | |
| OFF-state output current | IOZ | -5 | 5 | uA | Tamb=-40℃ to +85℃; VCC=6.0V; VI=VIH or VIL; VO=VCC or GND | 7 | |
| supply current | ICC | 10 | uA | Tamb=-40℃ to +85℃; VCC=6.0V; VI=VCC or GND; IO=0A | 7 | ||
| HIGH-level input voltage | VIH | 1.5 | V | Tamb=-40℃ to +125℃; VCC=2.0V | 8 | ||
| HIGH-level input voltage | VIH | 3.15 | V | Tamb=-40℃ to +125℃; VCC=4.5V | 8 | ||
| HIGH-level input voltage | VIH | 4.2 | V | Tamb=-40℃ to +125℃; VCC=6.0V | 8 | ||
| LOW-level input voltage | VIL | 0.5 | V | Tamb=-40℃ to +125℃; VCC=2.0V | 8 | ||
| LOW-level input voltage | VIL | 1.35 | V | Tamb=-40℃ to +125℃; VCC=4.5V | 8 | ||
| LOW-level input voltage | VIL | 1.8 | V | Tamb=-40℃ to +125℃; VCC=6.0V | 8 | ||
| LOW-level output voltage | VOL | 0.1 | V | Tamb=-40℃ to +125℃; VCC=2.0V; IO=20uA | 8 | ||
| LOW-level output voltage | VOL | 0.4 | V | Tamb=-40℃ to +125℃; VCC=4.5V; IO=4.0mA | 8 | ||
| input leakage current | II | -1 | 1 | uA | Tamb=-40℃ to +125℃; VCC=6.0V; VI=VCC or GND | 8 | |
| OFF-state output current | IOZ | -10 | 10 | uA | Tamb=-40℃ to +125℃; VCC=6.0V; VI=VIH or VIL; VO=VCC or GND | 8 | |
| supply current | ICC | 160 | uA | Tamb=-40℃ to +125℃; VCC=6.0V; VI=VCC or GND; IO=0A | 8 | ||
| propagation delay | tPLZ, tPZL | 41 | 155 | ns | Tamb=-40℃ to +85℃; VCC=2.0V; CL=50pF; see Figure 4 | 9 | |
| propagation delay | tPLZ, tPZL | 15 | 23 | ns | Tamb=-40℃ to +85℃; VCC=4.5V; CL=50pF | 9 | |
| propagation delay | tPLZ, tPZL | 12 | 20 | ns | Tamb=-40℃ to +85℃; VCC=6.0V; CL=50pF | 9 | |
| transition time | tTHL | 19 | 95 | ns | Tamb=-40℃ to +85℃; VCC=2.0V; CL=50pF; see Figure 4 | 9 | |
| transition time | tTHL | 7 | 19 | ns | Tamb=-40℃ to +85℃; VCC=4.5V; CL=50pF | 9 | |
| transition time | tTHL | 6 | 16 | ns | Tamb=-40℃ to +85℃; VCC=6.0V; CL=50pF | 9 | |
| propagation delay | tPLZ, tPZL | 190 | ns | Tamb=-40℃ to +125℃; VCC=2.0V; CL=50pF; see Figure 4 | 9 | ||
| propagation delay | tPLZ, tPZL | 38 | ns | Tamb=-40℃ to +125℃; VCC=4.5V; CL=50pF | 9 | ||
| propagation delay | tPLZ, tPZL | 32 | ns | Tamb=-40℃ to +125℃; VCC=6.0V; CL=50pF | 9 | ||
| transition time | tTHL | 110 | ns | Tamb=-40℃ to +125℃; VCC=2.0V; CL=50pF; see Figure 4 | 9 | ||
| transition time | tTHL | 22 | ns | Tamb=-40℃ to +125℃; VCC=4.5V; CL=50pF | 9 | ||
| transition time | tTHL | 19 | ns | Tamb=-40℃ to +125℃; VCC=6.0V; CL=50pF | 9 |
CAD (KiCad official)
- Symbol:
SN74HC01N - Footprint:
Package_DIP:DIP-14_W7.62mm - 3D model: DIP-14 (KiCad packages3D, STEP)
- 3D model files:
sn74hc01n-etched.step/sn74hc01n-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74hc01n.step/sn74hc01n.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: lingxingic datasheet (15 pp, sha256
fed8722ab99d9327, retrieved 2026-10-15, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).