component
SN74HC01DR
Public Made by Adomby adom
lingxingic Logic Gates, SOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
SN74HC01DR
lingxingic · Logic Gates · SOP-14
SN74HC01DR from lingxingic, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1Y | output | Data output of gate 1; open-drain, so it is LOW only when both 1A and 1B are HIGH and otherwise high-impedance (Z). |
| 2 | 1A | input | Data input A of gate 1; CMOS input levels on SN74HC01 and TTL input levels on SN74HCT01. |
| 3 | 1B | input | Data input B of gate 1; CMOS input levels on SN74HC01 and TTL input levels on SN74HCT01. |
| 4 | 2Y | output | Data output of gate 2; open-drain, so it is LOW only when both 2A and 2B are HIGH and otherwise high-impedance (Z). |
| 5 | 2A | input | Data input A of gate 2; CMOS input levels on SN74HC01 and TTL input levels on SN74HCT01. |
| 6 | 2B | input | Data input B of gate 2; CMOS input levels on SN74HC01 and TTL input levels on SN74HCT01. |
| 7 | GND | power_in | Ground (0 V) reference for all voltages on the device. |
| 8 | 3A | input | Data input A of gate 3; CMOS input levels on SN74HC01 and TTL input levels on SN74HCT01. |
| 9 | 3B | input | Data input B of gate 3; CMOS input levels on SN74HC01 and TTL input levels on SN74HCT01. |
| 10 | 3Y | output | Data output of gate 3; open-drain, so it is LOW only when both 3A and 3B are HIGH and otherwise high-impedance (Z). |
| 11 | 4A | input | Data input A of gate 4; CMOS input levels on SN74HC01 and TTL input levels on SN74HCT01. |
| 12 | 4B | input | Data input B of gate 4; CMOS input levels on SN74HC01 and TTL input levels on SN74HCT01. |
| 13 | 4Y | output | Data output of gate 4; open-drain, so it is LOW only when both 4A and 4B are HIGH and otherwise high-impedance (Z). |
| 14 | VCC | power_in | Supply voltage: recommended 2.0 V to 6.0 V for SN74HC01 and 4.5 V to 5.5 V for SN74HCT01 (absolute maximum 7 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | lingxingic |
| Package | SOP-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| HIGH-level input voltage | VIH | 1.5 | V | Tamb=-40℃ to +85℃; VCC=2.0V | 7 | ||
| HIGH-level input voltage | VIH | 3.15 | V | Tamb=-40℃ to +85℃; VCC=4.5V | 7 | ||
| HIGH-level input voltage | VIH | 4.2 | V | Tamb=-40℃ to +85℃; VCC=6.0V | 7 | ||
| LOW-level input voltage | VIL | 0.5 | V | Tamb=-40℃ to +85℃; VCC=2.0V | 7 | ||
| LOW-level input voltage | VIL | 1.35 | V | Tamb=-40℃ to +85℃; VCC=4.5V | 7 | ||
| LOW-level input voltage | VIL | 1.8 | V | Tamb=-40℃ to +85℃; VCC=6.0V | 7 | ||
| LOW-level output voltage | VOL | 0 | 0.1 | V | Tamb=-40℃ to +85℃; VCC=2.0V; IO=20uA | 7 | |
| LOW-level output voltage | VOL | 0.15 | 0.33 | V | Tamb=-40℃ to +85℃; VCC=4.5V; IO=4.0mA | 7 | |
| LOW-level output voltage | VOL | 0.16 | 0.33 | V | Tamb=-40℃ to +85℃; VCC=6.0V; IO=5.2mA | 7 | |
| input leakage current | II | -1 | 1 | uA | Tamb=-40℃ to +85℃; VCC=6.0V; VI=VCC or GND | 7 | |
| OFF-state output current | IOZ | -5 | 5 | uA | Tamb=-40℃ to +85℃; VCC=6.0V; VI=VIH or VIL; VO=VCC or GND | 7 | |
| supply current | ICC | 10 | uA | Tamb=-40℃ to +85℃; VCC=6.0V; VI=VCC or GND; IO=0A | 7 | ||
| HIGH-level input voltage | VIH | 1.5 | V | Tamb=-40℃ to +125℃; VCC=2.0V | 8 | ||
| HIGH-level input voltage | VIH | 3.15 | V | Tamb=-40℃ to +125℃; VCC=4.5V | 8 | ||
| HIGH-level input voltage | VIH | 4.2 | V | Tamb=-40℃ to +125℃; VCC=6.0V | 8 | ||
| LOW-level input voltage | VIL | 0.5 | V | Tamb=-40℃ to +125℃; VCC=2.0V | 8 | ||
| LOW-level input voltage | VIL | 1.35 | V | Tamb=-40℃ to +125℃; VCC=4.5V | 8 | ||
| LOW-level input voltage | VIL | 1.8 | V | Tamb=-40℃ to +125℃; VCC=6.0V | 8 | ||
| LOW-level output voltage | VOL | 0.1 | V | Tamb=-40℃ to +125℃; VCC=2.0V; IO=20uA | 8 | ||
| LOW-level output voltage | VOL | 0.4 | V | Tamb=-40℃ to +125℃; VCC=4.5V; IO=4.0mA | 8 | ||
| input leakage current | II | -1 | 1 | uA | Tamb=-40℃ to +125℃; VCC=6.0V; VI=VCC or GND | 8 | |
| OFF-state output current | IOZ | -10 | 10 | uA | Tamb=-40℃ to +125℃; VCC=6.0V; VI=VIH or VIL; VO=VCC or GND | 8 | |
| supply current | ICC | 160 | uA | Tamb=-40℃ to +125℃; VCC=6.0V; VI=VCC or GND; IO=0A | 8 | ||
| propagation delay | tPLZ, tPZL | 41 | 155 | ns | Tamb=-40℃ to +85℃; VCC=2.0V; CL=50pF; see Figure 4 | 9 | |
| propagation delay | tPLZ, tPZL | 15 | 23 | ns | Tamb=-40℃ to +85℃; VCC=4.5V; CL=50pF | 9 | |
| propagation delay | tPLZ, tPZL | 12 | 20 | ns | Tamb=-40℃ to +85℃; VCC=6.0V; CL=50pF | 9 | |
| transition time | tTHL | 19 | 95 | ns | Tamb=-40℃ to +85℃; VCC=2.0V; CL=50pF; see Figure 4 | 9 | |
| transition time | tTHL | 7 | 19 | ns | Tamb=-40℃ to +85℃; VCC=4.5V; CL=50pF | 9 | |
| transition time | tTHL | 6 | 16 | ns | Tamb=-40℃ to +85℃; VCC=6.0V; CL=50pF | 9 | |
| propagation delay | tPLZ, tPZL | 190 | ns | Tamb=-40℃ to +125℃; VCC=2.0V; CL=50pF; see Figure 4 | 9 | ||
| propagation delay | tPLZ, tPZL | 38 | ns | Tamb=-40℃ to +125℃; VCC=4.5V; CL=50pF | 9 | ||
| propagation delay | tPLZ, tPZL | 32 | ns | Tamb=-40℃ to +125℃; VCC=6.0V; CL=50pF | 9 | ||
| transition time | tTHL | 110 | ns | Tamb=-40℃ to +125℃; VCC=2.0V; CL=50pF; see Figure 4 | 9 | ||
| transition time | tTHL | 22 | ns | Tamb=-40℃ to +125℃; VCC=4.5V; CL=50pF | 9 | ||
| transition time | tTHL | 19 | ns | Tamb=-40℃ to +125℃; VCC=6.0V; CL=50pF | 9 | ||
| supply voltage | VCC | -0.5 | 7 | V | Voltages referenced to GND | 6 | |
| supply current | ICC | 50 | mA | 6 | |||
| ground current | IGND | -50 | mA | 6 | |||
| input clamping current | IIK | -20 | 20 | mA | VI < -0.5V or VI > VCC+0.5V | 6 | |
| output clamping current | IOK | -20 | 20 | mA | VO < -0.5V or VO > VCC+0.5V | 6 | |
| output current | IO | -25 | 25 | mA | -0.5V < VO < VCC+0.5V | 6 | |
| storage temperature | Tstg | -65 | 150 | ℃ | 6 | ||
| soldering temperature | TL | 260 | ℃ | 10s; SOP/TSSOP | 6 | ||
| supply voltage | VCC | 2 | 5 | 6 | V | SN74HC01 | 6 |
| input voltage | VI | 0 | V | SN74HC01; maximum printed as VCC (not numeric) | 6 | ||
| output voltage | VO | 0 | V | SN74HC01; maximum printed as VCC (not numeric) | 6 | ||
| ambient temperature | Tamb | -40 | 125 | ℃ | SN74HC01 | 6 |
CAD (KiCad official)
- Symbol:
SN74HC01DR - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOP-14 (KiCad packages3D, STEP)
- 3D model files:
sn74hc01dr-etched.step/sn74hc01dr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74hc01dr.step/sn74hc01dr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: lingxingic datasheet (15 pp, sha256
fed8722ab99d9327, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SN74HC01DR
**lingxingic** · Logic Gates · SOP-14
SN74HC01DR from lingxingic, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1Y | output | Data output of gate 1; open-drain, so it is LOW only when both 1A and 1B are HIGH and otherwise high-impedance (Z). |
| 2 | 1A | input | Data input A of gate 1; CMOS input levels on SN74HC01 and TTL input levels on SN74HCT01. |
| 3 | 1B | input | Data input B of gate 1; CMOS input levels on SN74HC01 and TTL input levels on SN74HCT01. |
| 4 | 2Y | output | Data output of gate 2; open-drain, so it is LOW only when both 2A and 2B are HIGH and otherwise high-impedance (Z). |
| 5 | 2A | input | Data input A of gate 2; CMOS input levels on SN74HC01 and TTL input levels on SN74HCT01. |
| 6 | 2B | input | Data input B of gate 2; CMOS input levels on SN74HC01 and TTL input levels on SN74HCT01. |
| 7 | GND | power_in | Ground (0 V) reference for all voltages on the device. |
| 8 | 3A | input | Data input A of gate 3; CMOS input levels on SN74HC01 and TTL input levels on SN74HCT01. |
| 9 | 3B | input | Data input B of gate 3; CMOS input levels on SN74HC01 and TTL input levels on SN74HCT01. |
| 10 | 3Y | output | Data output of gate 3; open-drain, so it is LOW only when both 3A and 3B are HIGH and otherwise high-impedance (Z). |
| 11 | 4A | input | Data input A of gate 4; CMOS input levels on SN74HC01 and TTL input levels on SN74HCT01. |
| 12 | 4B | input | Data input B of gate 4; CMOS input levels on SN74HC01 and TTL input levels on SN74HCT01. |
| 13 | 4Y | output | Data output of gate 4; open-drain, so it is LOW only when both 4A and 4B are HIGH and otherwise high-impedance (Z). |
| 14 | VCC | power_in | Supply voltage: recommended 2.0 V to 6.0 V for SN74HC01 and 4.5 V to 5.5 V for SN74HCT01 (absolute maximum 7 V). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | lingxingic |
| Package | SOP-14 |
| Category | Logic |
| Pins | 14 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| HIGH-level input voltage | VIH | 1.5 | | | V | Tamb=-40℃ to +85℃; VCC=2.0V | 7 |
| HIGH-level input voltage | VIH | 3.15 | | | V | Tamb=-40℃ to +85℃; VCC=4.5V | 7 |
| HIGH-level input voltage | VIH | 4.2 | | | V | Tamb=-40℃ to +85℃; VCC=6.0V | 7 |
| LOW-level input voltage | VIL | | | 0.5 | V | Tamb=-40℃ to +85℃; VCC=2.0V | 7 |
| LOW-level input voltage | VIL | | | 1.35 | V | Tamb=-40℃ to +85℃; VCC=4.5V | 7 |
| LOW-level input voltage | VIL | | | 1.8 | V | Tamb=-40℃ to +85℃; VCC=6.0V | 7 |
| LOW-level output voltage | VOL | | 0 | 0.1 | V | Tamb=-40℃ to +85℃; VCC=2.0V; IO=20uA | 7 |
| LOW-level output voltage | VOL | | 0.15 | 0.33 | V | Tamb=-40℃ to +85℃; VCC=4.5V; IO=4.0mA | 7 |
| LOW-level output voltage | VOL | | 0.16 | 0.33 | V | Tamb=-40℃ to +85℃; VCC=6.0V; IO=5.2mA | 7 |
| input leakage current | II | -1 | | 1 | uA | Tamb=-40℃ to +85℃; VCC=6.0V; VI=VCC or GND | 7 |
| OFF-state output current | IOZ | -5 | | 5 | uA | Tamb=-40℃ to +85℃; VCC=6.0V; VI=VIH or VIL; VO=VCC or GND | 7 |
| supply current | ICC | | | 10 | uA | Tamb=-40℃ to +85℃; VCC=6.0V; VI=VCC or GND; IO=0A | 7 |
| HIGH-level input voltage | VIH | 1.5 | | | V | Tamb=-40℃ to +125℃; VCC=2.0V | 8 |
| HIGH-level input voltage | VIH | 3.15 | | | V | Tamb=-40℃ to +125℃; VCC=4.5V | 8 |
| HIGH-level input voltage | VIH | 4.2 | | | V | Tamb=-40℃ to +125℃; VCC=6.0V | 8 |
| LOW-level input voltage | VIL | | | 0.5 | V | Tamb=-40℃ to +125℃; VCC=2.0V | 8 |
| LOW-level input voltage | VIL | | | 1.35 | V | Tamb=-40℃ to +125℃; VCC=4.5V | 8 |
| LOW-level input voltage | VIL | | | 1.8 | V | Tamb=-40℃ to +125℃; VCC=6.0V | 8 |
| LOW-level output voltage | VOL | | | 0.1 | V | Tamb=-40℃ to +125℃; VCC=2.0V; IO=20uA | 8 |
| LOW-level output voltage | VOL | | | 0.4 | V | Tamb=-40℃ to +125℃; VCC=4.5V; IO=4.0mA | 8 |
| input leakage current | II | -1 | | 1 | uA | Tamb=-40℃ to +125℃; VCC=6.0V; VI=VCC or GND | 8 |
| OFF-state output current | IOZ | -10 | | 10 | uA | Tamb=-40℃ to +125℃; VCC=6.0V; VI=VIH or VIL; VO=VCC or GND | 8 |
| supply current | ICC | | | 160 | uA | Tamb=-40℃ to +125℃; VCC=6.0V; VI=VCC or GND; IO=0A | 8 |
| propagation delay | tPLZ, tPZL | | 41 | 155 | ns | Tamb=-40℃ to +85℃; VCC=2.0V; CL=50pF; see Figure 4 | 9 |
| propagation delay | tPLZ, tPZL | | 15 | 23 | ns | Tamb=-40℃ to +85℃; VCC=4.5V; CL=50pF | 9 |
| propagation delay | tPLZ, tPZL | | 12 | 20 | ns | Tamb=-40℃ to +85℃; VCC=6.0V; CL=50pF | 9 |
| transition time | tTHL | | 19 | 95 | ns | Tamb=-40℃ to +85℃; VCC=2.0V; CL=50pF; see Figure 4 | 9 |
| transition time | tTHL | | 7 | 19 | ns | Tamb=-40℃ to +85℃; VCC=4.5V; CL=50pF | 9 |
| transition time | tTHL | | 6 | 16 | ns | Tamb=-40℃ to +85℃; VCC=6.0V; CL=50pF | 9 |
| propagation delay | tPLZ, tPZL | | | 190 | ns | Tamb=-40℃ to +125℃; VCC=2.0V; CL=50pF; see Figure 4 | 9 |
| propagation delay | tPLZ, tPZL | | | 38 | ns | Tamb=-40℃ to +125℃; VCC=4.5V; CL=50pF | 9 |
| propagation delay | tPLZ, tPZL | | | 32 | ns | Tamb=-40℃ to +125℃; VCC=6.0V; CL=50pF | 9 |
| transition time | tTHL | | | 110 | ns | Tamb=-40℃ to +125℃; VCC=2.0V; CL=50pF; see Figure 4 | 9 |
| transition time | tTHL | | | 22 | ns | Tamb=-40℃ to +125℃; VCC=4.5V; CL=50pF | 9 |
| transition time | tTHL | | | 19 | ns | Tamb=-40℃ to +125℃; VCC=6.0V; CL=50pF | 9 |
| supply voltage | VCC | -0.5 | | 7 | V | Voltages referenced to GND | 6 |
| supply current | ICC | | | 50 | mA | | 6 |
| ground current | IGND | -50 | | | mA | | 6 |
| input clamping current | IIK | -20 | | 20 | mA | VI < -0.5V or VI > VCC+0.5V | 6 |
| output clamping current | IOK | -20 | | 20 | mA | VO < -0.5V or VO > VCC+0.5V | 6 |
| output current | IO | -25 | | 25 | mA | -0.5V < VO < VCC+0.5V | 6 |
| storage temperature | Tstg | -65 | | 150 | ℃ | | 6 |
| soldering temperature | TL | | | 260 | ℃ | 10s; SOP/TSSOP | 6 |
| supply voltage | VCC | 2 | 5 | 6 | V | SN74HC01 | 6 |
| input voltage | VI | 0 | | | V | SN74HC01; maximum printed as VCC (not numeric) | 6 |
| output voltage | VO | 0 | | | V | SN74HC01; maximum printed as VCC (not numeric) | 6 |
| ambient temperature | Tamb | -40 | | 125 | ℃ | SN74HC01 | 6 |
## CAD (KiCad official)
- Symbol: `SN74HC01DR`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOP-14 (KiCad packages3D, STEP)
- 3D model files: `sn74hc01dr-etched.step` / `sn74hc01dr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74hc01dr.step` / `sn74hc01dr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [lingxingic datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603380565550907392) (15 pp, sha256 `fed8722ab99d9327`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sn74hc01dr-datasheet.pdf)