component
SN74HC00PW
Public Made by Adomby adom
lingxingic Logic Gates, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74HC00PW
lingxingic · Logic Gates · TSSOP-14
SN74HC00PW from lingxingic, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input A of NAND gate 1; the 2-input NAND function gives 1Y = NOT(1A AND 1B) per the datasheet function table. |
| 2 | 1B | input | Data input B of NAND gate 1; the 2-input NAND function gives 1Y = NOT(1A AND 1B) per the datasheet function table. |
| 3 | 1Y | output | Data output of NAND gate 1; it is high when either input is low and low only when both inputs are high. |
| 4 | 2A | input | Data input A of NAND gate 2; the 2-input NAND function gives 2Y = NOT(2A AND 2B) per the datasheet function table. |
| 5 | 2B | input | Data input B of NAND gate 2; the 2-input NAND function gives 2Y = NOT(2A AND 2B) per the datasheet function table. |
| 6 | 2Y | output | Data output of NAND gate 2; it is high when either input is low and low only when both inputs are high. |
| 7 | GND | power_in | Ground (0 V) reference for the device; the datasheet specifies GND = 0 V for all electrical characteristics. |
| 8 | 3Y | output | Data output of NAND gate 3; it is high when either input is low and low only when both inputs are high. |
| 9 | 3A | input | Data input A of NAND gate 3; the 2-input NAND function gives 3Y = NOT(3A AND 3B) per the datasheet function table. |
| 10 | 3B | input | Data input B of NAND gate 3; the 2-input NAND function gives 3Y = NOT(3A AND 3B) per the datasheet function table. |
| 11 | 4Y | output | Data output of NAND gate 4; it is high when either input is low and low only when both inputs are high. |
| 12 | 4A | input | Data input A of NAND gate 4; the 2-input NAND function gives 4Y = NOT(4A AND 4B) per the datasheet function table. |
| 13 | 4B | input | Data input B of NAND gate 4; the 2-input NAND function gives 4Y = NOT(4A AND 4B) per the datasheet function table. |
| 14 | VCC | power_in | Supply voltage; the recommended range is 2.0 V to 6.0 V (4.5 V to 5.5 V for the HCT variant), with an absolute maximum of +7 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | lingxingic |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
SN74HC00PW - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
sn74hc00pw-etched.step/sn74hc00pw-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74hc00pw.step/sn74hc00pw.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: lingxingic datasheet (18 pp, sha256
fcb61e0bc3653163, retrieved 2026-10-09, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).