component
SN74F574NSR
Public Made by Adomby adom
Texas Instruments Flip Flops, SOP-20-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 2d ago |
| viewers | 2d ago |
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| page.json | 2d ago |
| README.md | 2d ago |
| sn74f574nsr-etched.glb | 2d ago |
| sn74f574nsr-etched.step | 2d ago |
| sn74f574nsr-hero.glb | 1d ago |
| sn74f574nsr-hero.overlay.json | 2d ago |
| sn74f574nsr.glb | 2d ago |
| sn74f574nsr.kicad_mod | 2d ago |
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| sn74f574nsr.lbr | 2d ago |
| sn74f574nsr.step | 2d ago |
SN74F574NSR
Texas Instruments · Flip Flops · SOP-20-208mil
SN74F574NSR from Texas Instruments, in a SOP-20-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE | input | Output Enable; asserts low to enable 3-state outputs, high for high-impedance state |
| 2 | 1D | input | Data input for flip-flop 1; sampled on rising edge of clock |
| 3 | 2D | input | Data input for flip-flop 2; sampled on rising edge of clock |
| 4 | 3D | input | Data input for flip-flop 3; sampled on rising edge of clock |
| 5 | 4D | input | Data input for flip-flop 4; sampled on rising edge of clock |
| 6 | 5D | input | Data input for flip-flop 5; sampled on rising edge of clock |
| 7 | 6D | input | Data input for flip-flop 6; sampled on rising edge of clock |
| 8 | 7D | input | Data input for flip-flop 7; sampled on rising edge of clock |
| 9 | 8D | input | Data input for flip-flop 8; sampled on rising edge of clock |
| 10 | GND | power_in | Ground |
| 11 | CLK | input | Clock input; positive edge-triggered, latches data inputs to Q outputs on rising edge |
| 12 | 8Q | tri_state | Data output for flip-flop 8; 3-state tri-state output, high-impedance when OE high |
| 13 | 7Q | tri_state | Data output for flip-flop 7; 3-state tri-state output, high-impedance when OE high |
| 14 | 6Q | tri_state | Data output for flip-flop 6; 3-state tri-state output, high-impedance when OE high |
| 15 | 5Q | tri_state | Data output for flip-flop 5; 3-state tri-state output, high-impedance when OE high |
| 16 | 4Q | tri_state | Data output for flip-flop 4; 3-state tri-state output, high-impedance when OE high |
| 17 | 3Q | tri_state | Data output for flip-flop 3; 3-state tri-state output, high-impedance when OE high |
| 18 | 2Q | tri_state | Data output for flip-flop 2; 3-state tri-state output, high-impedance when OE high |
| 19 | 1Q | tri_state | Data output for flip-flop 1; 3-state tri-state output, high-impedance when OE high |
| 20 | VCC | power_in | Supply voltage; 4.5 V to 5.5 V nominal 5 V |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOP-20-208mil |
| Category | Logic |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
SN74F574NSR - Footprint:
Package_SO:SOP-20_7.5x12.8mm_P1.27mm - 3D model: SOP-20-208mil (KiCad packages3D, STEP)
- 3D model files:
sn74f574nsr-etched.step/sn74f574nsr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74f574nsr.step/sn74f574nsr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (15 pp, sha256
48cf86fb2d60d692, retrieved 2026-10-07, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).