component
SN74F30DR
Public Made by Adomby adom
Texas Instruments Logic Gates, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 2d ago |
| viewers | 2d ago |
| package.json | 2d ago |
| page.json | 2d ago |
| README.md | 2d ago |
| sn74f30dr-etched.glb | 2d ago |
| sn74f30dr-etched.step | 2d ago |
| sn74f30dr-hero.glb | 2d ago |
| sn74f30dr-hero.overlay.json | 2d ago |
| sn74f30dr.glb | 2d ago |
| sn74f30dr.kicad_mod | 2d ago |
| sn74f30dr.kicad_sym | 2d ago |
| sn74f30dr.lbr | 2d ago |
| sn74f30dr.step | 2d ago |
SN74F30DR
Texas Instruments · Logic Gates · SOIC-14
SN74F30DR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A | input | Input to 8-input NAND gate with VIH minimum 2V and VIL maximum 0.8V. |
| 2 | B | input | Input to 8-input NAND gate with VIH minimum 2V and VIL maximum 0.8V. |
| 3 | C | input | Input to 8-input NAND gate with VIH minimum 2V and VIL maximum 0.8V. |
| 4 | D | input | Input to 8-input NAND gate with VIH minimum 2V and VIL maximum 0.8V. |
| 5 | E | input | Input to 8-input NAND gate with VIH minimum 2V and VIL maximum 0.8V. |
| 6 | F | input | Input to 8-input NAND gate with VIH minimum 2V and VIL maximum 0.8V. |
| 7 | GND | power_in | Ground reference. |
| 8 | Y | output | NAND gate output with VOH minimum 2.5V at IOH=-1mA and VOL maximum 0.5V at IOL=20mA. |
| 9 | NC | unconnected | No internal connection. |
| 10 | NC | unconnected | No internal connection. |
| 11 | G | input | Input to 8-input NAND gate with VIH minimum 2V and VIL maximum 0.8V. |
| 12 | H | input | Input to 8-input NAND gate with VIH minimum 2V and VIL maximum 0.8V. |
| 13 | NC | unconnected | No internal connection. |
| 14 | VCC | power_in | Supply voltage with recommended range 4.5V to 5.5V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
SN74F30DR - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
sn74f30dr-etched.step/sn74f30dr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74f30dr.step/sn74f30dr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (19 pp, sha256
8e299fb186b7599a, retrieved 2026-10-03, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).