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SN74F240DWR

Public Made by Adom

by adom

Texas Instruments Buffers, Drivers, Receivers, Transceivers, SOIC-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SN74F240DWR

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SOIC-20

SN74F240DWR from Texas Instruments, in a SOIC-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OE input Active-low output enable for buffer section 1; when low the 1Y outputs follow the 1A inputs, and when high the 1Y outputs are in the high-impedance state.
2 1A1 input Data input 1A1 of the first 4-bit buffer section, passed to output 1Y1 when 1OE is low.
3 2Y4 tri_state Buffered 3-state output 2Y4 of the second buffer section, high-impedance when 2OE is high.
4 1A2 input Data input 1A2 of the first buffer section, passed to output 1Y2 when 1OE is low.
5 2Y3 tri_state Buffered 3-state output 2Y3 of the second buffer section, high-impedance when 2OE is high.
6 1A3 input Data input 1A3 of the first buffer section, passed to output 1Y3 when 1OE is low.
7 2Y2 tri_state Buffered 3-state output 2Y2 of the second buffer section, high-impedance when 2OE is high.
8 1A4 input Data input 1A4 of the first buffer section, passed to output 1Y4 when 1OE is low.
9 2Y1 tri_state Buffered 3-state output 2Y1 of the second buffer section, high-impedance when 2OE is high.
10 GND power_in Ground reference pin for the device.
11 2A1 input Data input 2A1 of the second buffer section, passed to output 2Y1 when 2OE is low.
12 1Y4 tri_state Buffered 3-state output 1Y4 of the first buffer section, high-impedance when 1OE is high.
13 2A2 input Data input 2A2 of the second buffer section, passed to output 2Y2 when 2OE is low.
14 1Y3 tri_state Buffered 3-state output 1Y3 of the first buffer section, high-impedance when 1OE is high.
15 2A3 input Data input 2A3 of the second buffer section, passed to output 2Y3 when 2OE is low.
16 1Y2 tri_state Buffered 3-state output 1Y2 of the first buffer section, high-impedance when 1OE is high.
17 2A4 input Data input 2A4 of the second buffer section, passed to output 2Y4 when 2OE is low.
18 1Y1 tri_state Buffered 3-state output 1Y1 of the first buffer section, high-impedance when 1OE is high.
19 2OE input Active-low output enable for buffer section 2; when low the 2Y outputs follow the 2A inputs, and when high the 2Y outputs are in the high-impedance state.
20 VCC power_in Positive supply pin; recommended supply range is 4.5 V to 5.5 V (5 V nominal) for the SN74F240.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-20
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: SN74F240DWR
  • Footprint: Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm
  • 3D model: SOIC-20 (KiCad packages3D, STEP)
  • 3D model files: sn74f240dwr-etched.step / sn74f240dwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74f240dwr.step / sn74f240dwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (19 pp, sha256 4e091c0b5e5b11a7, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF