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SN74F163ADR
Public Made by Adomby adom
Texas Instruments Counters, Dividers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74F163ADR
Texas Instruments · Counters, Dividers · SOIC-16
SN74F163ADR from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CLR | input | Active-low synchronous clear input that sets all flip-flop outputs low after the next clock rising edge. |
| 2 | CLK | input | Clock input that triggers the four flip-flops on the rising edge; frequency range 0-100 MHz at VCC = 5V. |
| 3 | A | input | Preset data input A for counter; setup time 5 ns before CLK rising edge. |
| 4 | B | input | Preset data input B for counter; setup time 5 ns before CLK rising edge. |
| 5 | C | input | Preset data input C for counter; setup time 5 ns before CLK rising edge. |
| 6 | D | input | Preset data input D for counter; setup time 5 ns before CLK rising edge. |
| 7 | ENP | input | Count enable parallel input (active high); both ENP and ENT must be high to count. |
| 8 | GND | power_in | Ground; reference potential for the device. |
| 9 | LOAD | input | Active-low synchronous load input; causes outputs to agree with preset data after next clock pulse. |
| 10 | ENT | input | Count enable trickle input (active high) fed forward to enable RCO when count equals 15. |
| 11 | QD | output | Counter output D; represents the D bit of the 4-bit binary counter. |
| 12 | QC | output | Counter output C; represents the C bit of the 4-bit binary counter. |
| 13 | QB | output | Counter output B; represents the B bit of the 4-bit binary counter. |
| 14 | QA | output | Counter output A; represents the A bit of the 4-bit binary counter. |
| 15 | RCO | output | Ripple carry output; produces a high-level pulse when count is 15 (HHHH) and is used to enable cascaded counter stages. |
| 16 | VCC | power_in | Supply voltage; operating range 4.5V to 5.5V with nominal 5V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16 |
| Category | Logic |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
SN74F163ADR - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
sn74f163adr-etched.step/sn74f163adr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74f163adr.step/sn74f163adr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (16 pp, sha256
258b08f1fad4d491, retrieved 2026-09-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).