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SN74F161ADR
Public Made by Adomby adom
Texas Instruments Counters, Dividers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74F161ADR
Texas Instruments · Counters, Dividers · SOIC-16
SN74F161ADR from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CLR | input | Asynchronous clear input; low logic level sets all four flip-flop outputs to low, independent of clock, load, and count-enable inputs. |
| 2 | CLK | input | Buffered clock input; triggers all four flip-flops on the rising (positive-going) edge, providing synchronous operation. |
| 3 | A | input | Preset data input A; loaded into QA output on next clock pulse when LOAD is low. |
| 4 | B | input | Preset data input B; loaded into QB output on next clock pulse when LOAD is low. |
| 5 | C | input | Preset data input C; loaded into QC output on next clock pulse when LOAD is low. |
| 6 | D | input | Preset data input D; loaded into QD output on next clock pulse when LOAD is low. |
| 7 | ENP | input | Count enable parallel input; counter counts only when both ENP and ENT are high. |
| 8 | GND | power_in | Ground; circuit return and negative terminal of power supply. |
| 9 | VCC | power_in | Positive supply voltage; recommended operating range 4.5 V to 5.5 V, nominal 5 V. |
| 10 | RCO | output | Ripple-carry output; produces high-logic-level pulse while count is 15 (HHHH) when ENT is high, for cascading counters. |
| 11 | QA | output | Output for bit A of the 4-bit binary counter; changes synchronously with clock when counter is enabled. |
| 12 | QB | output | Output for bit B of the 4-bit binary counter; changes synchronously with clock when counter is enabled. |
| 13 | QC | output | Output for bit C of the 4-bit binary counter; changes synchronously with clock when counter is enabled. |
| 14 | QD | output | Output for bit D of the 4-bit binary counter; changes synchronously with clock when counter is enabled. |
| 15 | ENT | input | Count enable trickle input; fed forward to enable RCO output, counter counts only when both ENP and ENT are high. |
| 16 | LOAD | input | Synchronous load/preset input; low logic level causes outputs to agree with preset data after next clock pulse, disabling count function. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16 |
| Category | Logic |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
SN74F161ADR - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
sn74f161adr-etched.step/sn74f161adr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74f161adr.step/sn74f161adr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (19 pp, sha256
7d7adc74f7e40595, retrieved 2026-09-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).