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SN74F138DR

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Texas Instruments Logic ICs, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SN74F138DR

Texas Instruments · Logic ICs · SOIC-16

SN74F138DR from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A input Binary-select input that, together with B and C, selects one of the eight outputs Y0 to Y7 when the enables are active.
2 B input Binary-select input that, together with A and C, selects one of the eight outputs Y0 to Y7 when the enables are active.
3 C input Binary-select input (most significant bit of the select code) that, together with A and B, selects one of the eight outputs Y0 to Y7 when the enables are active.
4 G2A input Active-low enable input; it must be low, along with G2B and with G1 high, for the selected output to go low.
5 G2B input Active-low enable input; it must be low, along with G2A and with G1 high, for the selected output to go low.
6 G1 input Active-high enable input; it must be high, with G2A and G2B low, for the decoder to be enabled.
7 Y7 output Active-low decoded output that goes low when the select code addresses line 7 and the device is enabled, otherwise stays high.
8 GND power_in Ground reference for the device.
9 Y6 output Active-low decoded output that goes low when the select code addresses line 6 and the device is enabled, otherwise stays high.
10 Y5 output Active-low decoded output that goes low when the select code addresses line 5 and the device is enabled, otherwise stays high.
11 Y4 output Active-low decoded output that goes low when the select code addresses line 4 and the device is enabled, otherwise stays high.
12 Y3 output Active-low decoded output that goes low when the select code addresses line 3 and the device is enabled, otherwise stays high.
13 Y2 output Active-low decoded output that goes low when the select code addresses line 2 and the device is enabled, otherwise stays high.
14 Y1 output Active-low decoded output that goes low when the select code addresses line 1 and the device is enabled, otherwise stays high.
15 Y0 output Active-low decoded output that goes low when the select code addresses line 0 and the device is enabled, otherwise stays high.
16 VCC power_in Supply voltage; recommended 4.5 V to 5.5 V with 5 V nominal, absolute maximum 7 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16
Category Logic ICs
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input clamp voltage VIK -1.2 V VCC = 4.5 V, II = -18 mA 4
High-level output voltage VOH 2.5 3.4 V VCC = 4.5 V, IOH = -1 mA 4
High-level output voltage VOH 2.7 V VCC = 4.75 V, IOH = -1 mA 4
Low-level output voltage VOL 0.3 0.5 V VCC = 4.5 V, IOL = 20 mA 4
Input current at maximum input voltage II 0.1 mA VCC = 5.5 V, VI = 7 V 4
High-level input current IIH 20 µA VCC = 5.5 V, VI = 2.7 V 4
Low-level input current IIL -0.6 mA VCC = 5.5 V, VI = 0.5 V 4
Short-circuit output current IOS -60 -150 mA VCC = 5.5 V, VO = 0; not more than one output shorted at a time, duration not over one second 4
Supply current ICC 13 20 mA VCC = 5.5 V, outputs enabled and open (see Note 2) 4
Supply voltage VCC 4.5 5 5.5 V 4
High-level input voltage VIH 2 V 4
Low-level input voltage VIL 0.8 V 4
Input clamp current IIK -18 mA 4
High-level output current IOH -1 mA 4
Low-level output current IOL 20 mA 4
Operating free-air temperature TA 0 70 °C SN74F138 4
Supply voltage range VCC -0.5 7 V 4
Input voltage range VI -1.2 7 V See Note 1 4
Input current range II -30 5 mA 4
Voltage applied to any output in the high state VO -0.5 V Upper limit is VCC 4
Current into any output in the low state IO 40 mA 4
Operating free-air temperature range TA 0 70 °C SN74F138 4
Storage temperature range Tstg -65 150 °C 4
Propagation delay low-to-high, A/B/C to Y tPLH 2.7 8.5 ns VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 500 Ω, TA = MIN to MAX 5
Propagation delay high-to-low, A/B/C to Y tPHL 3.2 9 ns VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 500 Ω, TA = MIN to MAX 5
Propagation delay low-to-high, G2A or G2B to Y tPLH 2.7 8 ns VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 500 Ω, TA = MIN to MAX 5
Propagation delay high-to-low, G2A or G2B to Y tPHL 2.2 7.5 ns VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 500 Ω, TA = MIN to MAX 5
Propagation delay low-to-high, G1 to Y tPLH 3.2 9 ns VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 500 Ω, TA = MIN to MAX 5
Propagation delay high-to-low, G1 to Y tPHL 2.7 8.5 ns VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 500 Ω, TA = MIN to MAX 5

CAD (KiCad official)

  • Symbol: SN74F138DR
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: sn74f138dr-etched.step / sn74f138dr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74f138dr.step / sn74f138dr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (20 pp, sha256 1a9770f61c3ab8c0, retrieved 2026-10-18, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF