component
SN74F04DR
Public Made by Adomby adom
Texas Instruments Inverters, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 12d ago |
| viewers | 12d ago |
| package.json | 4d ago |
| page.json | 4d ago |
| README.md | 12d ago |
| sn74f04dr-etched.glb | 4d ago |
| sn74f04dr-etched.step | 4d ago |
| sn74f04dr-hero.glb | 4d ago |
| sn74f04dr-hero.overlay.json | 4d ago |
| sn74f04dr.glb | 12d ago |
| sn74f04dr.kicad_mod | 12d ago |
| sn74f04dr.kicad_sym | 12d ago |
| sn74f04dr.lbr | 12d ago |
| sn74f04dr.step | 12d ago |
SN74F04DR
Texas Instruments · Inverters · SOIC-14
SN74F04DR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Input of inverter 1 (Y = A); for the SN74F04, VIH must be at least 2 V and VIL at most 0.8 V. |
| 2 | 1Y | output | Output of inverter 1 (Y = NOT A); low-level output current up to 20 mA and high-level output current limited to -1 mA. |
| 3 | 2A | input | Input of inverter 2 (Y = A); for the SN74F04, VIH must be at least 2 V and VIL at most 0.8 V. |
| 4 | 2Y | output | Output of inverter 2 (Y = NOT A); low-level output current up to 20 mA and high-level output current limited to -1 mA. |
| 5 | 3A | input | Input of inverter 3 (Y = A); for the SN74F04, VIH must be at least 2 V and VIL at most 0.8 V. |
| 6 | 3Y | output | Output of inverter 3 (Y = NOT A); low-level output current up to 20 mA and high-level output current limited to -1 mA. |
| 7 | GND | power_in | Ground reference for the device. |
| 8 | 4Y | output | Output of inverter 4 (Y = NOT A); low-level output current up to 20 mA and high-level output current limited to -1 mA. |
| 9 | 4A | input | Input of inverter 4 (Y = A); for the SN74F04, VIH must be at least 2 V and VIL at most 0.8 V. |
| 10 | 5Y | output | Output of inverter 5 (Y = NOT A); low-level output current up to 20 mA and high-level output current limited to -1 mA. |
| 11 | 5A | input | Input of inverter 5 (Y = A); for the SN74F04, VIH must be at least 2 V and VIL at most 0.8 V. |
| 12 | 6Y | output | Output of inverter 6 (Y = NOT A); low-level output current up to 20 mA and high-level output current limited to -1 mA. |
| 13 | 6A | input | Input of inverter 6 (Y = A); for the SN74F04, VIH must be at least 2 V and VIL at most 0.8 V. |
| 14 | VCC | power_in | Supply voltage; recommended range 4.5 V to 5.5 V (nominal 5 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
SN74F04DR - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
sn74f04dr-etched.step/sn74f04dr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74f04dr.step/sn74f04dr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (20 pp, sha256
6ca7af65b2cec431, retrieved 2026-10-11, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).