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Contents

README

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SN74CBTLV3253DR

Texas Instruments · Signal Switches, Multiplexers, Decoders · SOIC-16

SN74CBTLV3253DR from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OE input Output Enable 1, active-low control input; high disables Channel 1 multiplexer and forces 1A to high-impedance state
2 S1 input Select Pin 1, CMOS logic input used with S0 to select which of four B ports connects to common A port
3 1B4 bidirectional Channel 1 I/O 4, bidirectional FET switch port with 5Ω typical on-state resistance and rail-to-rail switching capability
4 1B3 bidirectional Channel 1 I/O 3, bidirectional FET switch port with 5Ω typical on-state resistance and rail-to-rail switching capability
5 1B2 bidirectional Channel 1 I/O 2, bidirectional FET switch port with 5Ω typical on-state resistance and rail-to-rail switching capability
6 1B1 bidirectional Channel 1 I/O 1, bidirectional FET switch port with 5Ω typical on-state resistance and rail-to-rail switching capability
7 1A bidirectional Channel 1 common, bidirectional switch port connecting to one of 1B1-1B4 through FET switch when 1OE is low
8 GND power_in Ground, negative supply rail and return path for device current
9 2A bidirectional Channel 2 common, bidirectional switch port connecting to one of 2B1-2B4 through FET switch when 2OE is low
10 2B1 bidirectional Channel 2 I/O 1, bidirectional FET switch port with 5Ω typical on-state resistance and rail-to-rail switching capability
11 2B2 bidirectional Channel 2 I/O 2, bidirectional FET switch port with 5Ω typical on-state resistance and rail-to-rail switching capability
12 2B3 bidirectional Channel 2 I/O 3, bidirectional FET switch port with 5Ω typical on-state resistance and rail-to-rail switching capability
13 2B4 bidirectional Channel 2 I/O 4, bidirectional FET switch port with 5Ω typical on-state resistance and rail-to-rail switching capability
14 S0 input Select Pin 0, CMOS logic input used with S1 to select which of four B ports connects to common A port
15 2OE input Output Enable 2, active-low control input; high disables Channel 2 multiplexer and forces 2A to high-impedance state
16 VCC power_in Supply voltage, operating range 2.3V to 3.6V per Recommended Operating Conditions with maximum continuous current ±128mA

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16
Category Logic
Pins 16

CAD (KiCad official)

  • Symbol: SN74CBTLV3253DR
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: sn74cbtlv3253dr-etched.step / sn74cbtlv3253dr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74cbtlv3253dr.step / sn74cbtlv3253dr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (37 pp, sha256 d6fb46fe6b7ccc5e, retrieved 2026-09-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF