component
SN74CBTD3384CDBR
Public Made by Adomby adom
Texas Instruments Analog Switches, Multiplexers, SSOP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SN74CBTD3384CDBR
Texas Instruments · Analog Switches, Multiplexers · SSOP-24
SN74CBTD3384CDBR from Texas Instruments, in a SSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Active-low output enable for the first 5-bit bus switch: low connects 1A to 1B, high disconnects them into high impedance, with VIH of 2 V minimum and VIL of 0.8 V maximum, and it should be pulled up to VCC to hold the high-impedance state during power up or power down. |
| 2 | 1B1 | bidirectional | B-side port 1 of the first 5-bit bus switch, switched to 1A1 when 1OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 3 | 1A1 | bidirectional | A-side port 1 of the first 5-bit bus switch, switched to 1B1 when 1OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 4 | 1A2 | bidirectional | A-side port 2 of the first 5-bit bus switch, switched to 1B2 when 1OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 5 | 1B2 | bidirectional | B-side port 2 of the first 5-bit bus switch, switched to 1A2 when 1OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 6 | 1B3 | bidirectional | B-side port 3 of the first 5-bit bus switch, switched to 1A3 when 1OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 7 | 1A3 | bidirectional | A-side port 3 of the first 5-bit bus switch, switched to 1B3 when 1OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 8 | 1A4 | bidirectional | A-side port 4 of the first 5-bit bus switch, switched to 1B4 when 1OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 9 | 1B4 | bidirectional | B-side port 4 of the first 5-bit bus switch, switched to 1A4 when 1OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 10 | 1B5 | bidirectional | B-side port 5 of the first 5-bit bus switch, switched to 1A5 when 1OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 11 | 1A5 | bidirectional | A-side port 5 of the first 5-bit bus switch, switched to 1B5 when 1OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 12 | GND | power_in | Device ground; all voltages on the device are specified with respect to this pin. |
| 13 | 2OE | input | Active-low output enable for the second 5-bit bus switch: low connects 2A to 2B, high disconnects them into high impedance, with VIH of 2 V minimum and VIL of 0.8 V maximum, and it should be pulled up to VCC to hold the high-impedance state during power up or power down. |
| 14 | 2A1 | bidirectional | A-side port 1 of the second 5-bit bus switch, switched to 2B1 when 2OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 15 | 2B1 | bidirectional | B-side port 1 of the second 5-bit bus switch, switched to 2A1 when 2OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 16 | 2B2 | bidirectional | B-side port 2 of the second 5-bit bus switch, switched to 2A2 when 2OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 17 | 2A2 | bidirectional | A-side port 2 of the second 5-bit bus switch, switched to 2B2 when 2OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 18 | 2A3 | bidirectional | A-side port 3 of the second 5-bit bus switch, switched to 2B3 when 2OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 19 | 2B3 | bidirectional | B-side port 3 of the second 5-bit bus switch, switched to 2A3 when 2OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 20 | 2B4 | bidirectional | B-side port 4 of the second 5-bit bus switch, switched to 2A4 when 2OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 21 | 2A4 | bidirectional | A-side port 4 of the second 5-bit bus switch, switched to 2B4 when 2OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 22 | 2A5 | bidirectional | A-side port 5 of the second 5-bit bus switch, switched to 2B5 when 2OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 23 | 2B5 | bidirectional | B-side port 5 of the second 5-bit bus switch, switched to 2A5 when 2OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 24 | VCC | power_in | Supply voltage, operating range 4.5 V to 5.5 V; the integrated diode in series with VCC provides 5-V input to 3.3-V output level shifting. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SSOP-24 |
| Category | Interface |
| Pins | 24 |
CAD (KiCad official)
- Symbol:
SN74CBTD3384CDBR - Footprint:
Package_SO:SSOP-24_5.3x8.2mm_P0.65mm - 3D model: SSOP-24 (KiCad packages3D, STEP)
- 3D model files:
sn74cbtd3384cdbr-etched.step/sn74cbtd3384cdbr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74cbtd3384cdbr.step/sn74cbtd3384cdbr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (24 pp, sha256
fa7b36a76c30e703, retrieved 2026-10-10, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SN74CBTD3384CDBR
**Texas Instruments** · Analog Switches, Multiplexers · SSOP-24
SN74CBTD3384CDBR from Texas Instruments, in a SSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Active-low output enable for the first 5-bit bus switch: low connects 1A to 1B, high disconnects them into high impedance, with VIH of 2 V minimum and VIL of 0.8 V maximum, and it should be pulled up to VCC to hold the high-impedance state during power up or power down. |
| 2 | 1B1 | bidirectional | B-side port 1 of the first 5-bit bus switch, switched to 1A1 when 1OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 3 | 1A1 | bidirectional | A-side port 1 of the first 5-bit bus switch, switched to 1B1 when 1OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 4 | 1A2 | bidirectional | A-side port 2 of the first 5-bit bus switch, switched to 1B2 when 1OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 5 | 1B2 | bidirectional | B-side port 2 of the first 5-bit bus switch, switched to 1A2 when 1OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 6 | 1B3 | bidirectional | B-side port 3 of the first 5-bit bus switch, switched to 1A3 when 1OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 7 | 1A3 | bidirectional | A-side port 3 of the first 5-bit bus switch, switched to 1B3 when 1OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 8 | 1A4 | bidirectional | A-side port 4 of the first 5-bit bus switch, switched to 1B4 when 1OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 9 | 1B4 | bidirectional | B-side port 4 of the first 5-bit bus switch, switched to 1A4 when 1OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 10 | 1B5 | bidirectional | B-side port 5 of the first 5-bit bus switch, switched to 1A5 when 1OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 11 | 1A5 | bidirectional | A-side port 5 of the first 5-bit bus switch, switched to 1B5 when 1OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 12 | GND | power_in | Device ground; all voltages on the device are specified with respect to this pin. |
| 13 | 2OE | input | Active-low output enable for the second 5-bit bus switch: low connects 2A to 2B, high disconnects them into high impedance, with VIH of 2 V minimum and VIL of 0.8 V maximum, and it should be pulled up to VCC to hold the high-impedance state during power up or power down. |
| 14 | 2A1 | bidirectional | A-side port 1 of the second 5-bit bus switch, switched to 2B1 when 2OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 15 | 2B1 | bidirectional | B-side port 1 of the second 5-bit bus switch, switched to 2A1 when 2OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 16 | 2B2 | bidirectional | B-side port 2 of the second 5-bit bus switch, switched to 2A2 when 2OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 17 | 2A2 | bidirectional | A-side port 2 of the second 5-bit bus switch, switched to 2B2 when 2OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 18 | 2A3 | bidirectional | A-side port 3 of the second 5-bit bus switch, switched to 2B3 when 2OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 19 | 2B3 | bidirectional | B-side port 3 of the second 5-bit bus switch, switched to 2A3 when 2OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 20 | 2B4 | bidirectional | B-side port 4 of the second 5-bit bus switch, switched to 2A4 when 2OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 21 | 2A4 | bidirectional | A-side port 4 of the second 5-bit bus switch, switched to 2B4 when 2OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 22 | 2A5 | bidirectional | A-side port 5 of the second 5-bit bus switch, switched to 2B5 when 2OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 23 | 2B5 | bidirectional | B-side port 5 of the second 5-bit bus switch, switched to 2A5 when 2OE is low, with the data I/O voltage rated 0 to 5.5 V and undershoot protection down to −2 V when the switch is off. |
| 24 | VCC | power_in | Supply voltage, operating range 4.5 V to 5.5 V; the integrated diode in series with VCC provides 5-V input to 3.3-V output level shifting. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SSOP-24 |
| Category | Interface |
| Pins | 24 |
## CAD (KiCad official)
- Symbol: `SN74CBTD3384CDBR`
- Footprint: `Package_SO:SSOP-24_5.3x8.2mm_P0.65mm`
- 3D model: SSOP-24 (KiCad packages3D, STEP)
- 3D model files: `sn74cbtd3384cdbr-etched.step` / `sn74cbtd3384cdbr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74cbtd3384cdbr.step` / `sn74cbtd3384cdbr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn74cbtd3384c) (24 pp, sha256 `fa7b36a76c30e703`, retrieved 2026-10-10, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sn74cbtd3384cdbr-datasheet.pdf)