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SN74CBT3257CDR
Public Made by Adomby adom
Texas Instruments Signal Switches, Multiplexers, Decoders, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74CBT3257CDR
Texas Instruments · Signal Switches, Multiplexers, Decoders · SOIC-16
SN74CBT3257CDR from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | input | Select input controls the multiplexer/demultiplexer data path (B1 or B2 connected to A) and is a TTL-compatible control input that should be held at VCC or GND if unused. |
| 2 | 1B1 | bidirectional | Switch I/O port connected to 1A when OE is low and S is low, with data I/O rated from 0 to 5.5 V. |
| 3 | 1B2 | bidirectional | Switch I/O port connected to 1A when OE is low and S is high, with data I/O rated from 0 to 5.5 V. |
| 4 | 1A | bidirectional | A-port of multiplexer channel 1, with undershoot protection to −2 V and data I/O rated from 0 to 5.5 V. |
| 5 | 2B1 | bidirectional | Switch I/O port connected to 2A when OE is low and S is low, with data I/O rated from 0 to 5.5 V. |
| 6 | 2B2 | bidirectional | Switch I/O port connected to 2A when OE is low and S is high, with data I/O rated from 0 to 5.5 V. |
| 7 | 2A | bidirectional | A-port of multiplexer channel 2, with undershoot protection to −2 V and data I/O rated from 0 to 5.5 V. |
| 8 | GND | power_in | Device ground reference for all voltages (absolute maximum ratings are referenced to ground). |
| 9 | 3A | bidirectional | A-port of multiplexer channel 3, with undershoot protection to −2 V and data I/O rated from 0 to 5.5 V. |
| 10 | 3B2 | bidirectional | Switch I/O port connected to 3A when OE is low and S is high, with data I/O rated from 0 to 5.5 V. |
| 11 | 3B1 | bidirectional | Switch I/O port connected to 3A when OE is low and S is low, with data I/O rated from 0 to 5.5 V. |
| 12 | 4A | bidirectional | A-port of multiplexer channel 4, with undershoot protection to −2 V and data I/O rated from 0 to 5.5 V. |
| 13 | 4B2 | bidirectional | Switch I/O port connected to 4A when OE is low and S is high, with data I/O rated from 0 to 5.5 V. |
| 14 | 4B1 | bidirectional | Switch I/O port connected to 4A when OE is low and S is low, with data I/O rated from 0 to 5.5 V. |
| 15 | OE | input | Active-low output enable: low connects the A and B ports, high disables the switch into a high-impedance state; tie to VCC through a pullup during power up/down. |
| 16 | VCC | power_in | Supply voltage, operating range 4 V to 5.5 V (absolute maximum 7 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16 |
| Category | Logic |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage range | VCC | -0.5 | 7 | V | 4 | ||
| Control input voltage range | VIN | -0.5 | 7 | V | See Notes 1 and 2 | 4 | |
| Switch I/O voltage range | VI/O | -0.5 | 7 | V | See Notes 1, 2, and 3 | 4 | |
| Control input clamp current | IIK | -50 | mA | VIN < 0 | 4 | ||
| I/O port clamp current | II/OK | -50 | mA | VI/O < 0 | 4 | ||
| ON-state switch current | II/O | -128 | 128 | mA | See Note 4 | 4 | |
| Continuous current through VCC or GND terminals | -100 | 100 | mA | 4 | |||
| Storage temperature range | Tstg | -65 | 150 | °C | 4 | ||
| Supply voltage | VCC | 4 | 5.5 | V | See Note 7 | 4 | |
| High-level control input voltage | VIH | 2 | 5.5 | V | 4 | ||
| Low-level control input voltage | VIL | 0 | 0.8 | V | 4 | ||
| Data input/output voltage | VI/O | 0 | 5.5 | V | 4 | ||
| Operating free-air temperature | TA | -40 | 85 | °C | 4 | ||
| Control inputs clamp voltage | VIK | -1.8 | V | VCC = 4.5 V, IIN = −18 mA | 5 | ||
| Data inputs undershoot clamp voltage | VIKU | -2 | V | VCC = 5 V, 0 mA > II ≥ −50 mA, VIN = VCC or GND, Switch OFF | 5 | ||
| Control inputs input current | IIN | -1 | 1 | µA | VCC = 5.5 V, VIN = VCC or GND | 5 | |
| Off-state I/O leakage current | IOZ | -10 | 10 | µA | VCC = 5.5 V, VO = 0 to 5.5 V, VI = 0, Switch OFF, VIN = VCC or GND; includes input leakage | 5 | |
| Partial-power-down leakage current | Ioff | 10 | µA | VCC = 0, VO = 0 to 5.5 V, VI = 0 | 5 | ||
| Quiescent supply current | ICC | 3 | µA | VCC = 5.5 V, II/O = 0, VIN = VCC or GND, Switch ON or OFF | 5 | ||
| Increase in supply current per control input | ΔICC | 2.5 | mA | VCC = 5.5 V, one input at 3.4 V, other inputs at VCC or GND | 5 | ||
| ON-state resistance at VCC = 4 V, VI = 2.4 V | ron | 8 | 12 | Ω | VCC = 4 V, VI = 2.4 V, IO = −15 mA | 5 | |
| ON-state resistance | ron | 3 | 6 | Ω | VI = 0, IO = 64 mA | 5 | |
| ON-state resistance at VCC = 4.5 V, VI = 0 | ron | 3 | 6 | Ω | VCC = 4.5 V, VI = 0, IO = 30 mA | 5 | |
| ON-state resistance at VCC = 4.5 V, VI = 2.4 V | ron | 5 | 10 | Ω | VCC = 4.5 V, VI = 2.4 V, IO = −15 mA | 5 | |
| Undershoot output voltage | VOUTU | 2 | V | VCC = 5.5 V, Switch OFF, VIN = VCC or GND | 6 | ||
| Propagation delay A or B to B or A (RC-calculated) | tpd | 0.24 | ns | VCC = 4 V ± 0.5 V, CL = 50 pF | 5 | ||
| Propagation delay A or B to B or A (RC-calculated) | tpd | 0.15 | ns | VCC = 5 V ± 0.5 V, CL = 50 pF | 5 | ||
| Select to A propagation delay | tpd(s) | 6 | ns | VCC = 4 V ± 0.5 V, CL = 50 pF | 5 | ||
| Select to A propagation delay | tpd(s) | 1.5 | 5.6 | ns | VCC = 5 V ± 0.5 V, CL = 50 pF | 5 | |
| Enable time S to B | ten | 6.3 | ns | VCC = 4 V ± 0.5 V, CL = 50 pF | 5 | ||
| Enable time S to B | ten | 1.5 | 5.8 | ns | VCC = 5 V ± 0.5 V, CL = 50 pF | 5 | |
| Enable time OE to A or B | ten | 6.3 | ns | VCC = 4 V ± 0.5 V, CL = 50 pF | 5 | ||
| Enable time OE to A or B | ten | 1.5 | 5.8 | ns | VCC = 5 V ± 0.5 V, CL = 50 pF | 5 | |
| Disable time S to B | tdis | 6.5 | ns | VCC = 4 V ± 0.5 V, CL = 50 pF | 5 | ||
| Disable time S to B | tdis | 1.5 | 6 | ns | VCC = 5 V ± 0.5 V, CL = 50 pF | 5 | |
| Disable time OE to A or B | tdis | 5.9 | ns | VCC = 4 V ± 0.5 V, CL = 50 pF | 5 | ||
| Disable time OE to A or B | tdis | 1.5 | 5.9 | ns | VCC = 5 V ± 0.5 V, CL = 50 pF | 5 | |
| Control input capacitance | Cin | 3.5 | pF | VIN = 3 V or 0 | 5 | ||
| A port OFF-state input/output capacitance | Cio(OFF) | 8.5 | pF | VI/O = 3 V or 0, Switch OFF, VIN = VCC or GND | 5 | ||
| B port OFF-state input/output capacitance | Cio(OFF) | 5.5 | pF | VI/O = 3 V or 0, Switch OFF, VIN = VCC or GND | 5 | ||
| ON-state input/output capacitance | Cio(ON) | 16.5 | pF | VI/O = 3 V or 0, Switch ON, VIN = VCC or GND | 5 | ||
| Package thermal impedance, D package | θJA | 73 | °C/W | D package, per JESD 51-7 (see Note 5) | 4 |
CAD (KiCad official)
- Symbol:
SN74CBT3257CDR - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
sn74cbt3257cdr-etched.step/sn74cbt3257cdr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74cbt3257cdr.step/sn74cbt3257cdr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (26 pp, sha256
b08cb4ed3303b0eb, retrieved 2026-10-18, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).