component
SN74CBT3125CPWR
Public Made by Adomby adom
Texas Instruments Signal Switches, Multiplexers, Decoders, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74CBT3125CPWR
Texas Instruments · Signal Switches, Multiplexers, Decoders · TSSOP-14
SN74CBT3125CPWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Active-low output enable for bus switch 1; when low the 1A-1B switch is ON, and when high it is OFF with high impedance between A and B, with control inputs accepting TTL or 5-V/3.3-V CMOS levels (VIH 2 V min, VIL 0.8 V max). |
| 2 | 1A | bidirectional | Data I/O A port of bus switch 1, rated 0 to 5.5 V, with undershoot protection to −2 V and ron of 3 Ω typical. |
| 3 | 1B | bidirectional | Data I/O B port of bus switch 1, rated 0 to 5.5 V, with undershoot protection to −2 V and ron of 3 Ω typical. |
| 4 | 2OE | input | Active-low output enable for bus switch 2; when low the 2A-2B switch is ON, and when high it is OFF with high impedance between A and B, with control inputs accepting TTL or 5-V/3.3-V CMOS levels (VIH 2 V min, VIL 0.8 V max). |
| 5 | 2A | bidirectional | Data I/O A port of bus switch 2, rated 0 to 5.5 V, with undershoot protection to −2 V and ron of 3 Ω typical. |
| 6 | 2B | bidirectional | Data I/O B port of bus switch 2, rated 0 to 5.5 V, with undershoot protection to −2 V and ron of 3 Ω typical. |
| 7 | GND | power_in | Ground reference for the device; all voltages are specified with respect to ground. |
| 8 | 3B | bidirectional | Data I/O B port of bus switch 3, rated 0 to 5.5 V, with undershoot protection to −2 V and ron of 3 Ω typical. |
| 9 | 3A | bidirectional | Data I/O A port of bus switch 3, rated 0 to 5.5 V, with undershoot protection to −2 V and ron of 3 Ω typical. |
| 10 | 3OE | input | Active-low output enable for bus switch 3; when low the 3A-3B switch is ON, and when high it is OFF with high impedance between A and B, with control inputs accepting TTL or 5-V/3.3-V CMOS levels (VIH 2 V min, VIL 0.8 V max). |
| 11 | 4B | bidirectional | Data I/O B port of bus switch 4, rated 0 to 5.5 V, with undershoot protection to −2 V and ron of 3 Ω typical. |
| 12 | 4A | bidirectional | Data I/O A port of bus switch 4, rated 0 to 5.5 V, with undershoot protection to −2 V and ron of 3 Ω typical. |
| 13 | 4OE | input | Active-low output enable for bus switch 4; when low the 4A-4B switch is ON, and when high it is OFF with high impedance between A and B, with control inputs accepting TTL or 5-V/3.3-V CMOS levels (VIH 2 V min, VIL 0.8 V max). |
| 14 | VCC | power_in | Supply voltage pin, operating range 4 V to 5.5 V, with OE to be tied to VCC through a pullup to keep the high-impedance state at power up or down. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 4 | 5.5 | V | 3 | ||
| High-level control input voltage | VIH | 2 | 5.5 | V | 3 | ||
| Low-level control input voltage | VIL | 0 | 0.8 | V | 3 | ||
| Data input/output voltage | VI/O | 0 | 5.5 | V | 3 | ||
| Operating free-air temperature | TA | -40 | 85 | °C | 3 | ||
| Supply voltage range | VCC | -0.5 | 7 | V | 3 | ||
| Control input voltage range | VIN | -0.5 | 7 | V | 3 | ||
| Switch I/O voltage range | VI/O | -0.5 | 7 | V | 3 | ||
| Control input clamp current | IIK | -50 | mA | VIN < 0 | 3 | ||
| I/O port clamp current | II/OK | -50 | mA | VI/O < 0 | 3 | ||
| ON-state switch current | II/O | -128 | 128 | mA | 3 | ||
| Continuous current through VCC or GND terminals | -100 | 100 | mA | 3 | |||
| Storage temperature range | Tstg | -65 | 150 | °C | 3 | ||
| Package thermal impedance, PW package | θJA | 113 | °C/W | PW package, see Note 5 (JESD 51-7) | 3 | ||
| Input clamp voltage, control inputs | VIK | -1.8 | V | VCC = 4.5 V, IIN = −18 mA | 4 | ||
| Input clamp voltage, data inputs | VIKU | -2 | V | VCC = 5 V, 0 mA > II ≥ −50 mA, VIN = VCC or GND, Switch OFF | 4 | ||
| Control input leakage current | IIN | -1 | 1 | µA | VCC = 5.5 V, VIN = VCC or GND | 4 | |
| Off-state I/O leakage current | IOZ | -10 | 10 | µA | VCC = 5.5 V, VO = 0 to 5.5 V, VI = 0, Switch OFF, VIN = VCC or GND | 4 | |
| Partial-power-down leakage current | Ioff | 10 | µA | VCC = 0, VO = 0 to 5.5 V, VI = 0 | 4 | ||
| Supply current | ICC | 3 | µA | VCC = 5.5 V, II/O = 0, VIN = VCC or GND, Switch ON or OFF | 4 | ||
| Increase in supply current per control input | ∆ICC | 2.5 | mA | VCC = 5.5 V, One input at 3.4 V, Other inputs at VCC or GND | 4 | ||
| ON-state resistance at VCC = 4 V | ron | 8 | 12 | Ω | VCC = 4 V, VI = 2.4 V, IO = −15 mA | 4 | |
| ON-state resistance | ron | 3 | 6 | Ω | VCC = 4 V, VI = 0, IO = 64 mA | 4 | |
| ON-state resistance at VCC = 4.5 V | ron | 3 | 6 | Ω | VCC = 4.5 V, VI = 0, IO = 30 mA | 4 | |
| ON-state resistance at VCC = 4.5 V | ron | 5 | 10 | Ω | VCC = 4.5 V, VI = 2.4 V, IO = −15 mA | 4 | |
| Undershoot output voltage | VOUTU | 2 | V | VCC = 5.5 V, Switch OFF, VIN = VCC or GND | 5 |
CAD (KiCad official)
- Symbol:
SN74CBT3125CPWR - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
sn74cbt3125cpwr-etched.step/sn74cbt3125cpwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74cbt3125cpwr.step/sn74cbt3125cpwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (25 pp, sha256
898af39109b7c77d, retrieved 2026-10-17, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusoff(skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).