component
SN74CBT3125CDR
Public Made by Adomby adom
Texas Instruments Signal Switches, Multiplexers, Decoders, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SN74CBT3125CDR
Texas Instruments · Signal Switches, Multiplexers, Decoders · SOIC-14
SN74CBT3125CDR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Active-low output enable for bus switch 1; the 1A-1B switch is ON when low and OFF (high-impedance) when high, and OE should be tied to VCC through a pullup resistor to keep the switch OFF during power up or power down. |
| 2 | 1A | bidirectional | A port of bus switch 1, connected to 1B when 1OE is low; undershoot protection clamps the port to −2 V minimum while the switch is OFF. |
| 3 | 1B | bidirectional | B port of bus switch 1, with typical ON-state resistance of 3 Ω and Ioff support for partial-power-down operation. |
| 4 | 2OE | input | Active-low output enable for bus switch 2; the 2A-2B switch is ON when low and OFF (high-impedance) when high. |
| 5 | 2A | bidirectional | A port of bus switch 2, connected to 2B when 2OE is low; undershoot protection clamps the port to −2 V minimum while the switch is OFF. |
| 6 | 2B | bidirectional | B port of bus switch 2, with typical ON-state resistance of 3 Ω and Ioff support for partial-power-down operation. |
| 7 | GND | power_in | Ground reference for all voltages; continuous current through the GND terminal is limited to ±100 mA. |
| 8 | 3B | bidirectional | B port of bus switch 3, with typical ON-state resistance of 3 Ω and Ioff support for partial-power-down operation. |
| 9 | 3A | bidirectional | A port of bus switch 3, connected to 3B when 3OE is low; undershoot protection clamps the port to −2 V minimum while the switch is OFF. |
| 10 | 3OE | input | Active-low output enable for bus switch 3; the 3A-3B switch is ON when low and OFF (high-impedance) when high. |
| 11 | 4B | bidirectional | B port of bus switch 4, with typical ON-state resistance of 3 Ω and Ioff support for partial-power-down operation. |
| 12 | 4A | bidirectional | A port of bus switch 4, connected to 4B when 4OE is low; undershoot protection clamps the port to −2 V minimum while the switch is OFF. |
| 13 | 4OE | input | Active-low output enable for bus switch 4; the 4A-4B switch is ON when low and OFF (high-impedance) when high. |
| 14 | VCC | power_in | Supply voltage, recommended operating range 4 V to 5.5 V (absolute maximum −0.5 V to 7 V), with continuous current through the VCC terminal limited to ±100 mA. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 4 | 5.5 | V | 3 | ||
| High-level control input voltage | VIH | 2 | 5.5 | V | 3 | ||
| Low-level control input voltage | VIL | 0 | 0.8 | V | 3 | ||
| Data input/output voltage | VI/O | 0 | 5.5 | V | 3 | ||
| Operating free-air temperature | TA | -40 | 85 | °C | 3 | ||
| Supply voltage range | VCC | -0.5 | 7 | V | 3 | ||
| Control input voltage range | VIN | -0.5 | 7 | V | 3 | ||
| Switch I/O voltage range | VI/O | -0.5 | 7 | V | 3 | ||
| Control input clamp current | IIK | -50 | mA | VIN < 0 | 3 | ||
| I/O port clamp current | II/OK | -50 | mA | VI/O < 0 | 3 | ||
| ON-state switch current | II/O | -128 | 128 | mA | 3 | ||
| Continuous current through VCC or GND terminals | -100 | 100 | mA | 3 | |||
| Storage temperature range | Tstg | -65 | 150 | °C | 3 | ||
| Package thermal impedance, D package | θJA | 86 | °C/W | D package, JESD 51-7 | 3 | ||
| Control input clamp voltage | VIK | -1.8 | V | VCC = 4.5 V, IIN = −18 mA | 4 | ||
| Data input undershoot clamp voltage | VIKU | -2 | V | VCC = 5 V, 0 mA > II ≥ −50 mA, VIN = VCC or GND, Switch OFF | 4 | ||
| Control input leakage current | IIN | -1 | 1 | µA | VCC = 5.5 V, VIN = VCC or GND | 4 | |
| Off-state I/O leakage current | IOZ | -10 | 10 | µA | VCC = 5.5 V, VO = 0 to 5.5 V, VI = 0, Switch OFF, VIN = VCC or GND | 4 | |
| Partial power-down leakage current | Ioff | 10 | µA | VCC = 0, VO = 0 to 5.5 V, VI = 0 | 4 | ||
| Quiescent supply current | ICC | 3 | µA | VCC = 5.5 V, II/O = 0, VIN = VCC or GND, Switch ON or OFF | 4 | ||
| Increase in supply current per control input at 3.4 V | ΔICC | 2.5 | mA | VCC = 5.5 V, One input at 3.4 V, Other inputs at VCC or GND | 4 | ||
| ON-state resistance | ron | 8 | 12 | Ω | VCC = 4 V, VI = 2.4 V, IO = −15 mA | 4 | |
| ON-state resistance | ron | 3 | 6 | Ω | VI = 0, IO = 64 mA | 4 | |
| ON-state resistance | ron | 5 | 10 | Ω | VCC = 4.5 V, VI = 2.4 V, IO = −15 mA | 4 | |
| Propagation delay time (A or B to B or A) | tpd | 0.24 | ns | VCC = 4 V ± 0.5 V (see Figure 3) | 4 | ||
| Propagation delay time (A or B to B or A) | tpd | 0.15 | ns | VCC = 5 V (see Figure 3) | 4 | ||
| Enable time (OE to A or B) | ten | 4.4 | ns | VCC = 4 V ± 0.5 V (see Figure 3) | 4 | ||
| Enable time (OE to A or B) | ten | 1.5 | 4 | ns | VCC = 5 V (see Figure 3) | 4 | |
| Disable time (OE to A or B) | tdis | 4.4 | ns | VCC = 4 V ± 0.5 V (see Figure 3) | 4 | ||
| Disable time (OE to A or B) | tdis | 1.5 | 4.4 | ns | VCC = 5 V (see Figure 3) | 4 | |
| Undershoot output voltage | VOUTU | 2 | V | VCC = 5.5 V, Switch OFF, VIN = VCC or GND | 5 |
CAD (KiCad official)
- Symbol:
SN74CBT3125CDR - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
sn74cbt3125cdr-etched.step/sn74cbt3125cdr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74cbt3125cdr.step/sn74cbt3125cdr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (25 pp, sha256
898af39109b7c77d, retrieved 2026-10-17, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SN74CBT3125CDR
**Texas Instruments** · Signal Switches, Multiplexers, Decoders · SOIC-14
SN74CBT3125CDR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Active-low output enable for bus switch 1; the 1A-1B switch is ON when low and OFF (high-impedance) when high, and OE should be tied to VCC through a pullup resistor to keep the switch OFF during power up or power down. |
| 2 | 1A | bidirectional | A port of bus switch 1, connected to 1B when 1OE is low; undershoot protection clamps the port to −2 V minimum while the switch is OFF. |
| 3 | 1B | bidirectional | B port of bus switch 1, with typical ON-state resistance of 3 Ω and Ioff support for partial-power-down operation. |
| 4 | 2OE | input | Active-low output enable for bus switch 2; the 2A-2B switch is ON when low and OFF (high-impedance) when high. |
| 5 | 2A | bidirectional | A port of bus switch 2, connected to 2B when 2OE is low; undershoot protection clamps the port to −2 V minimum while the switch is OFF. |
| 6 | 2B | bidirectional | B port of bus switch 2, with typical ON-state resistance of 3 Ω and Ioff support for partial-power-down operation. |
| 7 | GND | power_in | Ground reference for all voltages; continuous current through the GND terminal is limited to ±100 mA. |
| 8 | 3B | bidirectional | B port of bus switch 3, with typical ON-state resistance of 3 Ω and Ioff support for partial-power-down operation. |
| 9 | 3A | bidirectional | A port of bus switch 3, connected to 3B when 3OE is low; undershoot protection clamps the port to −2 V minimum while the switch is OFF. |
| 10 | 3OE | input | Active-low output enable for bus switch 3; the 3A-3B switch is ON when low and OFF (high-impedance) when high. |
| 11 | 4B | bidirectional | B port of bus switch 4, with typical ON-state resistance of 3 Ω and Ioff support for partial-power-down operation. |
| 12 | 4A | bidirectional | A port of bus switch 4, connected to 4B when 4OE is low; undershoot protection clamps the port to −2 V minimum while the switch is OFF. |
| 13 | 4OE | input | Active-low output enable for bus switch 4; the 4A-4B switch is ON when low and OFF (high-impedance) when high. |
| 14 | VCC | power_in | Supply voltage, recommended operating range 4 V to 5.5 V (absolute maximum −0.5 V to 7 V), with continuous current through the VCC terminal limited to ±100 mA. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 4 | | 5.5 | V | | 3 |
| High-level control input voltage | VIH | 2 | | 5.5 | V | | 3 |
| Low-level control input voltage | VIL | 0 | | 0.8 | V | | 3 |
| Data input/output voltage | VI/O | 0 | | 5.5 | V | | 3 |
| Operating free-air temperature | TA | -40 | | 85 | °C | | 3 |
| Supply voltage range | VCC | -0.5 | | 7 | V | | 3 |
| Control input voltage range | VIN | -0.5 | | 7 | V | | 3 |
| Switch I/O voltage range | VI/O | -0.5 | | 7 | V | | 3 |
| Control input clamp current | IIK | -50 | | | mA | VIN < 0 | 3 |
| I/O port clamp current | II/OK | -50 | | | mA | VI/O < 0 | 3 |
| ON-state switch current | II/O | -128 | | 128 | mA | | 3 |
| Continuous current through VCC or GND terminals | | -100 | | 100 | mA | | 3 |
| Storage temperature range | Tstg | -65 | | 150 | °C | | 3 |
| Package thermal impedance, D package | θJA | | 86 | | °C/W | D package, JESD 51-7 | 3 |
| Control input clamp voltage | VIK | | | -1.8 | V | VCC = 4.5 V, IIN = −18 mA | 4 |
| Data input undershoot clamp voltage | VIKU | | | -2 | V | VCC = 5 V, 0 mA > II ≥ −50 mA, VIN = VCC or GND, Switch OFF | 4 |
| Control input leakage current | IIN | -1 | | 1 | µA | VCC = 5.5 V, VIN = VCC or GND | 4 |
| Off-state I/O leakage current | IOZ | -10 | | 10 | µA | VCC = 5.5 V, VO = 0 to 5.5 V, VI = 0, Switch OFF, VIN = VCC or GND | 4 |
| Partial power-down leakage current | Ioff | | | 10 | µA | VCC = 0, VO = 0 to 5.5 V, VI = 0 | 4 |
| Quiescent supply current | ICC | | | 3 | µA | VCC = 5.5 V, II/O = 0, VIN = VCC or GND, Switch ON or OFF | 4 |
| Increase in supply current per control input at 3.4 V | ΔICC | | | 2.5 | mA | VCC = 5.5 V, One input at 3.4 V, Other inputs at VCC or GND | 4 |
| ON-state resistance | ron | | 8 | 12 | Ω | VCC = 4 V, VI = 2.4 V, IO = −15 mA | 4 |
| ON-state resistance | ron | | 3 | 6 | Ω | VI = 0, IO = 64 mA | 4 |
| ON-state resistance | ron | | 5 | 10 | Ω | VCC = 4.5 V, VI = 2.4 V, IO = −15 mA | 4 |
| Propagation delay time (A or B to B or A) | tpd | | | 0.24 | ns | VCC = 4 V ± 0.5 V (see Figure 3) | 4 |
| Propagation delay time (A or B to B or A) | tpd | | | 0.15 | ns | VCC = 5 V (see Figure 3) | 4 |
| Enable time (OE to A or B) | ten | | | 4.4 | ns | VCC = 4 V ± 0.5 V (see Figure 3) | 4 |
| Enable time (OE to A or B) | ten | 1.5 | | 4 | ns | VCC = 5 V (see Figure 3) | 4 |
| Disable time (OE to A or B) | tdis | | | 4.4 | ns | VCC = 4 V ± 0.5 V (see Figure 3) | 4 |
| Disable time (OE to A or B) | tdis | 1.5 | | 4.4 | ns | VCC = 5 V (see Figure 3) | 4 |
| Undershoot output voltage | VOUTU | 2 | | | V | VCC = 5.5 V, Switch OFF, VIN = VCC or GND | 5 |
## CAD (KiCad official)
- Symbol: `SN74CBT3125CDR`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files: `sn74cbt3125cdr-etched.step` / `sn74cbt3125cdr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74cbt3125cdr.step` / `sn74cbt3125cdr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/sn74cbt3125c.pdf) (25 pp, sha256 `898af39109b7c77d`, retrieved 2026-10-17, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sn74cbt3125cdr-datasheet.pdf)