Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

main

Generated by kicad-footprint-generator · KiCad file format 20260206

Name	Last commit message	Last updated
docs	Publish 0.1.0 · Ray	2d ago
viewers	sn74cb3t3384pwr: viewers · Ray	2d ago
package.json	Publish 0.1.0 · Ray	2d ago
page.json	Set visibility: public · Ray	2d ago
README.md	Initial commit: component/sn74cb3t3384pwr · Ray	2d ago
sn74cb3t3384pwr-etched.glb	sn74cb3t3384pwr: factory component page (tier=mfr) · Ray	2d ago
sn74cb3t3384pwr-etched.step	sn74cb3t3384pwr: factory component page (tier=mfr) · Ray	2d ago
sn74cb3t3384pwr-hero.glb	sn74cb3t3384pwr: hero GLB from the etched model (keeps the MPN mark) · Ray	1d ago
sn74cb3t3384pwr-hero.overlay.json	Publish 0.1.0 · Ray	2d ago
sn74cb3t3384pwr.glb	Publish 0.1.0 · Ray	2d ago
sn74cb3t3384pwr.kicad_mod	Publish 0.1.0 · Ray	2d ago
sn74cb3t3384pwr.kicad_sym	Publish 0.1.0 · Ray	2d ago
sn74cb3t3384pwr.lbr	Publish 0.1.0 · Ray	2d ago
sn74cb3t3384pwr.step	Publish 0.1.0 · Ray	2d ago

SN74CB3T3384PWR

Texas Instruments · Analog Switches, Multiplexers · TSSOP-24

SN74CB3T3384PWR from Texas Instruments, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	1OE	input	Active-low output enable for the first 5-bit bus switch: when low the 1A and 1B ports are connected, and when high they are in high-impedance; tie to VCC through a pullup resistor so the high-impedance state holds during power up or power down.
2	1B1	bidirectional	B-side data port 1 of the first 5-bit switch, connected to 1A1 when 1OE is low; 5-V tolerant, with data I/O rated 0 to 5.5 V.
3	1A1	bidirectional	A-side data port 1 of the first 5-bit switch, connected to 1B1 when 1OE is low; 5-V tolerant, with data I/O rated 0 to 5.5 V.
4	1A2	bidirectional	A-side data port 2 of the first 5-bit switch, connected to 1B2 when 1OE is low; 5-V tolerant, with data I/O rated 0 to 5.5 V.
5	1B2	bidirectional	B-side data port 2 of the first 5-bit switch, connected to 1A2 when 1OE is low; 5-V tolerant, with data I/O rated 0 to 5.5 V.
6	1B3	bidirectional	B-side data port 3 of the first 5-bit switch, connected to 1A3 when 1OE is low; 5-V tolerant, with data I/O rated 0 to 5.5 V.
7	1A3	bidirectional	A-side data port 3 of the first 5-bit switch, connected to 1B3 when 1OE is low; 5-V tolerant, with data I/O rated 0 to 5.5 V.
8	1A4	bidirectional	A-side data port 4 of the first 5-bit switch, connected to 1B4 when 1OE is low; 5-V tolerant, with data I/O rated 0 to 5.5 V.
9	1B4	bidirectional	B-side data port 4 of the first 5-bit switch, connected to 1A4 when 1OE is low; 5-V tolerant, with data I/O rated 0 to 5.5 V.
10	1B5	bidirectional	B-side data port 5 of the first 5-bit switch, connected to 1A5 when 1OE is low; 5-V tolerant, with data I/O rated 0 to 5.5 V.
11	1A5	bidirectional	A-side data port 5 of the first 5-bit switch, connected to 1B5 when 1OE is low; 5-V tolerant, with data I/O rated 0 to 5.5 V.
12	GND	power_in	Ground reference for the device; all voltages are referenced to ground.
13	2OE	input	Active-low output enable for the second 5-bit bus switch: when low the 2A and 2B ports are connected, and when high they are in high-impedance; tie to VCC through a pullup resistor so the high-impedance state holds during power up or power down.
14	2A1	bidirectional	A-side data port 1 of the second 5-bit switch, connected to 2B1 when 2OE is low; 5-V tolerant, with data I/O rated 0 to 5.5 V.
15	2B1	bidirectional	B-side data port 1 of the second 5-bit switch, connected to 2A1 when 2OE is low; 5-V tolerant, with data I/O rated 0 to 5.5 V.
16	2B2	bidirectional	B-side data port 2 of the second 5-bit switch, connected to 2A2 when 2OE is low; 5-V tolerant, with data I/O rated 0 to 5.5 V.
17	2A2	bidirectional	A-side data port 2 of the second 5-bit switch, connected to 2B2 when 2OE is low; 5-V tolerant, with data I/O rated 0 to 5.5 V.
18	2A3	bidirectional	A-side data port 3 of the second 5-bit switch, connected to 2B3 when 2OE is low; 5-V tolerant, with data I/O rated 0 to 5.5 V.
19	2B3	bidirectional	B-side data port 3 of the second 5-bit switch, connected to 2A3 when 2OE is low; 5-V tolerant, with data I/O rated 0 to 5.5 V.
20	2B4	bidirectional	B-side data port 4 of the second 5-bit switch, connected to 2A4 when 2OE is low; 5-V tolerant, with data I/O rated 0 to 5.5 V.
21	2A4	bidirectional	A-side data port 4 of the second 5-bit switch, connected to 2B4 when 2OE is low; 5-V tolerant, with data I/O rated 0 to 5.5 V.
22	2A5	bidirectional	A-side data port 5 of the second 5-bit switch, connected to 2B5 when 2OE is low; 5-V tolerant, with data I/O rated 0 to 5.5 V.
23	2B5	bidirectional	B-side data port 5 of the second 5-bit switch, connected to 2A5 when 2OE is low; 5-V tolerant, with data I/O rated 0 to 5.5 V.
24	VCC	power_in	Supply voltage, recommended operating range 2.3 V to 3.6 V, with ICC of 40 µA max; the data I/O output high level tracks VCC.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	TSSOP-24
Category	Interface
Pins	24

CAD (KiCad official)

Symbol: SN74CB3T3384PWR
Footprint: Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm
3D model: TSSOP-24 (KiCad packages3D, STEP)
3D model files: sn74cb3t3384pwr-etched.step / sn74cb3t3384pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74cb3t3384pwr.step / sn74cb3t3384pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (20 pp, sha256 e32443ebedbb3d06, retrieved 2026-10-08, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF