component
SN74BCT760MDWREP
Public Made by Adomby adom
Texas Instruments Buffers, Drivers, Receivers, Transceivers, SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SN74BCT760MDWREP
Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SOIC-20-300mil
SN74BCT760MDWREP from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Active-low output enable for buffer 1; when low the 1A inputs pass to the 1Y outputs, and when high the 1Y outputs go to the high-impedance state. |
| 2 | 1A1 | input | Data input 1A1 of buffer 1; recommended VIH minimum is 2 V and VIL maximum is 0.8 V, with absolute input voltage range of -0.5 V to 7 V. |
| 3 | 2Y4 | output | Open-collector output 2Y4 of buffer 2; drives bus lines and must not exceed the 5.5 V limit when in the disabled or power-off state. |
| 4 | 1A2 | input | Data input 1A2 of buffer 1; recommended VIH minimum is 2 V and VIL maximum is 0.8 V, with absolute input voltage range of -0.5 V to 7 V. |
| 5 | 2Y3 | output | Open-collector output 2Y3 of buffer 2; drives bus lines and must not exceed the 5.5 V limit when in the disabled or power-off state. |
| 6 | 1A3 | input | Data input 1A3 of buffer 1; recommended VIH minimum is 2 V and VIL maximum is 0.8 V, with absolute input voltage range of -0.5 V to 7 V. |
| 7 | 2Y2 | output | Open-collector output 2Y2 of buffer 2; drives bus lines and must not exceed the 5.5 V limit when in the disabled or power-off state. |
| 8 | 1A4 | input | Data input 1A4 of buffer 1; recommended VIH minimum is 2 V and VIL maximum is 0.8 V, with absolute input voltage range of -0.5 V to 7 V. |
| 9 | 2Y1 | output | Open-collector output 2Y1 of buffer 2; drives bus lines and must not exceed the 5.5 V limit when in the disabled or power-off state. |
| 10 | GND | power_in | Device ground reference. |
| 11 | 2A1 | input | Data input 2A1 of buffer 2; recommended VIH minimum is 2 V and VIL maximum is 0.8 V, with absolute input voltage range of -0.5 V to 7 V. |
| 12 | 1Y4 | output | Open-collector output 1Y4 of buffer 1; drives bus lines and must not exceed the 5.5 V limit when in the disabled or power-off state. |
| 13 | 2A2 | input | Data input 2A2 of buffer 2; recommended VIH minimum is 2 V and VIL maximum is 0.8 V, with absolute input voltage range of -0.5 V to 7 V. |
| 14 | 1Y3 | output | Open-collector output 1Y3 of buffer 1; drives bus lines and must not exceed the 5.5 V limit when in the disabled or power-off state. |
| 15 | 2A3 | input | Data input 2A3 of buffer 2; recommended VIH minimum is 2 V and VIL maximum is 0.8 V, with absolute input voltage range of -0.5 V to 7 V. |
| 16 | 1Y2 | output | Open-collector output 1Y2 of buffer 1; drives bus lines and must not exceed the 5.5 V limit when in the disabled or power-off state. |
| 17 | 2A4 | input | Data input 2A4 of buffer 2; recommended VIH minimum is 2 V and VIL maximum is 0.8 V, with absolute input voltage range of -0.5 V to 7 V. |
| 18 | 1Y1 | output | Open-collector output 1Y1 of buffer 1; drives bus lines and must not exceed the 5.5 V limit when in the disabled or power-off state. |
| 19 | 2OE | input | Active-low output enable for buffer 2; when low the 2A inputs pass to the 2Y outputs, and when high the 2Y outputs go to the high-impedance state. |
| 20 | VCC | power_in | Supply voltage, recommended 4.5 V to 5.5 V (5 V nominal), absolute maximum 7 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-20-300mil |
| Category | Logic |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
SN74BCT760MDWREP - Footprint:
Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm - 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
- 3D model files:
sn74bct760mdwrep-etched.step/sn74bct760mdwrep-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74bct760mdwrep.step/sn74bct760mdwrep.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (13 pp, sha256
1562dd604815f176, retrieved 2026-10-07, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SN74BCT760MDWREP
**Texas Instruments** · Buffers, Drivers, Receivers, Transceivers · SOIC-20-300mil
SN74BCT760MDWREP from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Active-low output enable for buffer 1; when low the 1A inputs pass to the 1Y outputs, and when high the 1Y outputs go to the high-impedance state. |
| 2 | 1A1 | input | Data input 1A1 of buffer 1; recommended VIH minimum is 2 V and VIL maximum is 0.8 V, with absolute input voltage range of -0.5 V to 7 V. |
| 3 | 2Y4 | output | Open-collector output 2Y4 of buffer 2; drives bus lines and must not exceed the 5.5 V limit when in the disabled or power-off state. |
| 4 | 1A2 | input | Data input 1A2 of buffer 1; recommended VIH minimum is 2 V and VIL maximum is 0.8 V, with absolute input voltage range of -0.5 V to 7 V. |
| 5 | 2Y3 | output | Open-collector output 2Y3 of buffer 2; drives bus lines and must not exceed the 5.5 V limit when in the disabled or power-off state. |
| 6 | 1A3 | input | Data input 1A3 of buffer 1; recommended VIH minimum is 2 V and VIL maximum is 0.8 V, with absolute input voltage range of -0.5 V to 7 V. |
| 7 | 2Y2 | output | Open-collector output 2Y2 of buffer 2; drives bus lines and must not exceed the 5.5 V limit when in the disabled or power-off state. |
| 8 | 1A4 | input | Data input 1A4 of buffer 1; recommended VIH minimum is 2 V and VIL maximum is 0.8 V, with absolute input voltage range of -0.5 V to 7 V. |
| 9 | 2Y1 | output | Open-collector output 2Y1 of buffer 2; drives bus lines and must not exceed the 5.5 V limit when in the disabled or power-off state. |
| 10 | GND | power_in | Device ground reference. |
| 11 | 2A1 | input | Data input 2A1 of buffer 2; recommended VIH minimum is 2 V and VIL maximum is 0.8 V, with absolute input voltage range of -0.5 V to 7 V. |
| 12 | 1Y4 | output | Open-collector output 1Y4 of buffer 1; drives bus lines and must not exceed the 5.5 V limit when in the disabled or power-off state. |
| 13 | 2A2 | input | Data input 2A2 of buffer 2; recommended VIH minimum is 2 V and VIL maximum is 0.8 V, with absolute input voltage range of -0.5 V to 7 V. |
| 14 | 1Y3 | output | Open-collector output 1Y3 of buffer 1; drives bus lines and must not exceed the 5.5 V limit when in the disabled or power-off state. |
| 15 | 2A3 | input | Data input 2A3 of buffer 2; recommended VIH minimum is 2 V and VIL maximum is 0.8 V, with absolute input voltage range of -0.5 V to 7 V. |
| 16 | 1Y2 | output | Open-collector output 1Y2 of buffer 1; drives bus lines and must not exceed the 5.5 V limit when in the disabled or power-off state. |
| 17 | 2A4 | input | Data input 2A4 of buffer 2; recommended VIH minimum is 2 V and VIL maximum is 0.8 V, with absolute input voltage range of -0.5 V to 7 V. |
| 18 | 1Y1 | output | Open-collector output 1Y1 of buffer 1; drives bus lines and must not exceed the 5.5 V limit when in the disabled or power-off state. |
| 19 | 2OE | input | Active-low output enable for buffer 2; when low the 2A inputs pass to the 2Y outputs, and when high the 2Y outputs go to the high-impedance state. |
| 20 | VCC | power_in | Supply voltage, recommended 4.5 V to 5.5 V (5 V nominal), absolute maximum 7 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-20-300mil |
| Category | Logic |
| Pins | 20 |
## CAD (KiCad official)
- Symbol: `SN74BCT760MDWREP`
- Footprint: `Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm`
- 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
- 3D model files: `sn74bct760mdwrep-etched.step` / `sn74bct760mdwrep-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74bct760mdwrep.step` / `sn74bct760mdwrep.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn74bct760-ep) (13 pp, sha256 `1562dd604815f176`, retrieved 2026-10-07, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sn74bct760mdwrep-datasheet.pdf)