Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

SN74AUP3G34DCUR

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · VSSOP-8

SN74AUP3G34DCUR from Texas Instruments, in a VSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Input of buffer gate 1; performs Boolean Y = A; VI range 0 V to 3.6 V, Ci = 1.5 pF typical, input leakage II ≤ 0.5 µA over 0 V to 3.6 V.
2 3Y output Output of buffer gate 3; performs Boolean Y = A; IOH = −4 mA / IOL = 4 mA at VCC = 3 V, tpd = 4.3 ns max at 3.3 V (CL = 5 pF).
3 2A input Input of buffer gate 2; performs Boolean Y = A; VI range 0 V to 3.6 V, Ci = 1.5 pF typical, input leakage II ≤ 0.5 µA over 0 V to 3.6 V.
4 GND power_in Ground reference; continuous current through GND pin ±50 mA maximum absolute; common return for all three buffer gates.
5 2Y output Output of buffer gate 2; performs Boolean Y = A; IOH = −4 mA / IOL = 4 mA at VCC = 3 V, tpd = 4.3 ns max at 3.3 V (CL = 5 pF).
6 3A input Input of buffer gate 3; performs Boolean Y = A; VI range 0 V to 3.6 V, Ci = 1.5 pF typical, input leakage II ≤ 0.5 µA over 0 V to 3.6 V.
7 1Y output Output of buffer gate 1; performs Boolean Y = A; IOH = −4 mA / IOL = 4 mA at VCC = 3 V, tpd = 4.3 ns max at 3.3 V (CL = 5 pF).
8 VCC power_in Positive supply voltage; operating range 0.8 V to 3.6 V (absolute max 4.6 V), ICC = 0.9 µA maximum static current at IO = 0.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VSSOP-8
Category Logic
Pins 8

CAD (KiCad official)

  • Symbol: SN74AUP3G34DCUR
  • Footprint: Package_SO:VSSOP-8_2.3x2mm_P0.5mm
  • 3D model: VSSOP-8 (KiCad packages3D, STEP)
  • 3D model files: sn74aup3g34dcur-etched.step / sn74aup3g34dcur-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74aup3g34dcur.step / sn74aup3g34dcur.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (26 pp, sha256 f188afa526b90420, retrieved 2026-09-26, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF