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SN74AUP2G125DCUR
Public Made by Adomby adom
Texas Instruments Buffers, Drivers, Receivers, Transceivers, VSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SN74AUP2G125DCUR
Texas Instruments · Buffers, Drivers, Receivers, Transceivers · VSSOP-8
SN74AUP2G125DCUR from Texas Instruments, in a VSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Output enable for gate 1; when this input is high, output 1Y is disabled to the high-impedance state, and when low, 1Y follows 1A. |
| 2 | 1A | input | Data input for gate 1, which is 3.6-V I/O tolerant and has an input-disable feature that allows floating inputs. |
| 3 | 2Y | tri_state | 3-state output of gate 2, which is high-impedance whenever 2OE is high. |
| 4 | GND | power_in | Ground reference for the device. |
| 5 | 2A | input | Data input for gate 2, which is 3.6-V I/O tolerant and has an input-disable feature that allows floating inputs. |
| 6 | 1Y | tri_state | 3-state output of gate 1, which is high-impedance whenever 1OE is high. |
| 7 | 2OE | input | Output enable for gate 2; when this input is high, output 2Y is disabled to the high-impedance state, and when low, 2Y follows 2A. |
| 8 | VCC | power_in | Supply voltage, specified from 0.8 V to 3.6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VSSOP-8 |
| Category | Logic |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
SN74AUP2G125DCUR - Footprint:
Package_SO:VSSOP-8_2.3x2mm_P0.5mm - 3D model: VSSOP-8 (KiCad packages3D, STEP)
- 3D model files:
sn74aup2g125dcur-etched.step/sn74aup2g125dcur-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74aup2g125dcur.step/sn74aup2g125dcur.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (30 pp, sha256
3869b21c277f7fb3, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SN74AUP2G125DCUR
**Texas Instruments** · Buffers, Drivers, Receivers, Transceivers · VSSOP-8
SN74AUP2G125DCUR from Texas Instruments, in a VSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Output enable for gate 1; when this input is high, output 1Y is disabled to the high-impedance state, and when low, 1Y follows 1A. |
| 2 | 1A | input | Data input for gate 1, which is 3.6-V I/O tolerant and has an input-disable feature that allows floating inputs. |
| 3 | 2Y | tri_state | 3-state output of gate 2, which is high-impedance whenever 2OE is high. |
| 4 | GND | power_in | Ground reference for the device. |
| 5 | 2A | input | Data input for gate 2, which is 3.6-V I/O tolerant and has an input-disable feature that allows floating inputs. |
| 6 | 1Y | tri_state | 3-state output of gate 1, which is high-impedance whenever 1OE is high. |
| 7 | 2OE | input | Output enable for gate 2; when this input is high, output 2Y is disabled to the high-impedance state, and when low, 2Y follows 2A. |
| 8 | VCC | power_in | Supply voltage, specified from 0.8 V to 3.6 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VSSOP-8 |
| Category | Logic |
| Pins | 8 |
## CAD (KiCad official)
- Symbol: `SN74AUP2G125DCUR`
- Footprint: `Package_SO:VSSOP-8_2.3x2mm_P0.5mm`
- 3D model: VSSOP-8 (KiCad packages3D, STEP)
- 3D model files: `sn74aup2g125dcur-etched.step` / `sn74aup2g125dcur-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74aup2g125dcur.step` / `sn74aup2g125dcur.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn74aup2g125) (30 pp, sha256 `3869b21c277f7fb3`, retrieved 2026-10-11, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sn74aup2g125dcur-datasheet.pdf)